| 数据搜索系统,热门电子元器件搜索 |
|
TLE6211 数据表(PDF) 18 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
TLE6211 数据表(HTML) 18 Page - Infineon Technologies AG |
|
18 / 35 page ![]() TLE 6210 TLE 6211 Block Description and Electrical Characteristics V1.2 Data Sheet 18 2002-08 Supervision The TLE 6210 and TLE 6211 are equipped with a complex supervision logic. The input voltage and the regulator output voltage is supervised. In addition two m-controller are supervised by independent watchdog circuits. 4.9 Overvoltage and Undervoltage Both the supply voltage UZP and the output voltage UST are supervised for over- and undervoltage. In case any undervoltage or overvoltage condition at UST or UZP is detected, the reset outputs RES1 and RES2 are switched to low state. RES1 and RES2 are not controlled by the watchdog logic. To supervise the output voltage UST an independent bandgap from the reference bandgap is used. The reset outputs RES1 and RES2 are together controlled by the UST reset logic and the supply undervoltage lockout (UVLO) and overvoltage lockout (OVLO). A logic High at the RES1 and RES2 indicates normal operation. The outputs are open collector type outputs with integrated pull-up resistors to UST. Even when the UST voltage drops, the reset outputs RES1 and RES2 remain low (< 0.4 V). Both undervoltage and overvoltage detection of UST and UZP use a voltage hysteresis to avoid any reset toggling. Undervoltage and Overvoltage Detection UST The UST output voltage has to be externally connected to the USTS sense input. To be able to detect also wrong output voltages causes by a malfunction of the related bandgap reference for supervision an independent bandgap is used. As soon as any reset condition is detected the RES1 and RES2 go low. 4.9.1 Undervoltage Lockout (UVLO) and Overvoltage Lockout (OVLO) The supply voltage UZP is supervised as well. If the voltage rises above the upper threshold value of 19.5 V reset is asserted. When an undervoltage occurs, after some time the output voltage will drop below the reset threshold and a reset is asserted. The undervoltage lockout is only valid during power up. Both the OVLO and the UVLO threshold use a hysteresis to avoid reset glitches. In addition the OVLO is digitally filtered. Overvoltage below 2 to 3 clock cycles (equals typical 2 µs or 3 µs) are neglected to avoid resetting the system when any inductive load is switched off. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |