TLE 6210

TLE 6211

Block Description and Electrical Characteristics

V1.2 Data Sheet

19

2002-08

When the undervoltage condition at

time of typical 52 ms (52 clock cycles) is started. After this time the reset signal is set

high.

Z: high impedance

* In the application the voltage is undefined as regulator is off

Table 1

Truth Table Overvoltage and Undervoltage Supervision

The table assumes that no other error is detected, especially no watchdog failure and no

clock failure.

Supply

voltage

Regulator

Voltage

SILA

NSILA

MR

VR

EN

RES 1

RES 2

Regulator

ok

ok

= SIA = not SIA = not

MRA

LZ

H

ON

ok

under-

voltage

L

Z

ZZL

L

ON

normal

over-

voltage

L

Z

ZZL

H

ON

under-

voltage

under-

voltage

L

Z

ZZZ*

L

OFF

under-

voltage

ok

= SIA = not SIA not

MRA

LH

H

ON

over-

voltage

x

= L

Z

ZZZ*

L

OFF