TLE6211 datasheet(23/35 Pages) INFINEON

23 / 35 page

TLE 6210

TLE 6211

Block Description and Electrical Characteristics

V1.2 Data Sheet

2002-08

4.11

Watchdog

To supervise the operation of 2

m-processors watchdog logic for two input signals is

integrated. The logic expects at each WD1 and WD2 rectangular signals with 10 ms high

and 10 ms low time. Deviations from the expected time are counted as errors and

influence the output signals.

A digital filter suppresses noise or pulses below 3 clock cycles (typ. 3 ms).

The detection ciruit is described in Figure 12.

After power up and 1or 2 valid watchdog edges the WD logic enables the output Drivers.

Figure 5

Enable output EN after correct watchdog signals at WD1 and WD2

are present; WD1 and WD2 start with logic Low

Figure 6

Enable output EN after correct watchdog signals at WD1 and WD2

are present; WD1 and WD2 start with logic High

WD1

WD2

10ms

3* t

CLK after the 2nd WD-edge (falling edge)

wd-start-up-with Low

AD 04/02

WD1

WD2

3 * t

CLK after 1st. WD edge

10ms

wd-start-up-with High

AD 04/02

TLE6211 数据表(PDF) 23 Page - Infineon Technologies AG

TLE6211 数据表(HTML) 23 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

数据表下载