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IMX7SCEC 数据表(PDF) 102 Page - NXP Semiconductors

部件名 IMX7SCEC
功能描述  i.MX 7Solo Family
PDF  152 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

IMX7SCEC 数据表(HTML) 102 Page - NXP Semiconductors

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Electrical characteristics
i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017
NXP Semiconductors
102
4.10.10.2 DDR Mode
Figure 74. QuadSPI Input/Read Timing (DDR mode with internal sampling)
Figure 75. QuadSPI Input/Read Timing (DDR mode with loopback DQS sampling)
NOTE
•
For internal sampling, the timing values assumes using sample point 0,
that is QuadSPIx_SMPR[SDRSMP] = 0.
Table 75. QuadSPI Input/Read Timing (DDR mode with internal sampling)
Symbol
Parameter
Value
Unit
Min
Max
TIS
Setup time for incoming data
8.67
—
ns
TIH
Hold time requirement for incoming data
0
—
ns
Table 76. QuadSPI Input/Read Timing (DDR mode with loopback DQS sampling)
Symbol
Parameter
Value
Unit
Min
Max
TIS
Setup time for incoming data
2
—
ns
TIH
Hold time requirement for incoming data
1
—
ns



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