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AD8330 数据表(PDF) 6 Page - Analog Devices |
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AD8330 数据表(HTML) 6 Page - Analog Devices |
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6 / 32 page ![]() AD8330 Data Sheet Rev. H | Page 6 of 32 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NOTES 1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE GROUND PLANE. VPSI INHI INLO MODE OPHI VPSO OPLO CMOP 12 11 10 1 3 4 9 2 AD8330 TOP VIEW (Not to Scale) Figure 2. 16-Lead LFCSP Pin Configuration Table 3. 16-Lead LFCSP Pin Function Descriptions Pin No. Mnemonic Description 1 VPSI Positive Supply for Input Stages. 2 INHI Differential Signal Input, Positive Polarity. 3 INLO Differential Signal Input, Negative Polarity. 4 MODE Logic Input: Selects Gain Slope. High = gain up vs. VDBS. 5 VDBS Input for Linear-in-dB Gain Control Voltage, VDBS. 6 CMGN Common Baseline for Gain Control Interfaces. 7 COMM Ground for Input and Gain Control Bias Circuitry. 8 VMAG Input for Gain/Amplitude Control, VMAG. 9 CMOP Ground for Output Stages. 10 OPLO Differential Signal Output, Negative Polarity. 11 OPHI Differential Signal Output, Positive Polarity. 12 VPSO Positive Supply for Output Stages. 13 CNTR Common-Mode Output Voltage Control. 14 VPOS Positive Supply for Inner Stages. 15 OFST Internal Offset Compensation Feature. When the OFST pin is unconnected, this feature is enabled. When the OFST pin is grounded, this feature is disabled. See the Offset Compensation section. 16 ENBL Power Enable, Active High. EPAD Exposed Pad. The exposed pad is not connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the ground plane. |
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