AD8124

Data Sheet

Rev. A | Page 6 of 15

PIN CONFIGURATION AND FUNCTION DESCRIPTION

NIC

NIC

GND

NIC

PD

NIC

TOP VIEW

(Not to Scale)

AD8124

NIC = NO INTERNAL CONNECT

NOTES

1. EXPOSED PADDLE ON THE BOTTOM OF THE PACKAGE

MUST BE CONNECTED TO A PCB PLANE TO ACHIEVE

SPECIFIED THERMAL RESISTANCE.

1

2

3

4

5

6

7

8

9

10

23

24

25

26

27

28

29

30

22

21

1

2

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 10, 20, 21, 30, 40

NIC

No Internal Connection.

2

Positive Input, Comparator 1.

3

Negative Input, Comparator 1.

4

Output, Comparator 1.

5

6

Output, Comparator 2.

7

Negative Input, Comparator 2.

8

Positive Input, Comparator 2.

9

11, 14, 17, 22, 33

Negative Power Supply, Equalizer Sections.

12

Output, Blue Channel.

13, 16, 19, 29, 36

Positive Power Supply, Equalizer Sections.

15

Output, Green Channel.

18

Output, Red Channel.

23

Output Offset Control Voltage.

24, 39

GND

Signal Ground Reference.

25

Broadband Flat Gain Control Voltage.

26

Equalizer High Frequency Boost Control Voltage.

27

Equalizer Pole Location Adjustment Control Voltage.

28

PD

Power Down.

31

Positive Input, Red Channel.

32

Negative Input, Red Channel.

34

Positive Input, Green Channel.

35

Negative Input, Green Channel.

37

Positive Input, Blue Channel.

38

Negative Input, Blue Channel.

Exposed Underside Pad