Data Sheet

AD8124

Rev. A | Page 13 of 15

USING THE AD8124 WITH COAXIAL CABLE

types of cable, including coaxial cable. Figure 17 presents the

AD8124 is used with good quality 75 Ω video cable. Figure 23

20Ω

5.11kΩ

20kΩ

–5V

+5V

24.3kΩ

47.5kΩ

1.16kΩ

10kΩ

1.24kΩ

unity. A passive offset circuit requires an offset injection voltage

that is much larger in magnitude than the available −5 V supply.

independently.

The AD8124 differential input can accept signals carried over

unbalanced cable, as shown in Figure 24, for an unbalanced

75 Ω coaxial cable termination.

75Ω

INPUT FROM

75Ω CABLE

AD8124

INPUT STAGE

Figure 24. Terminating a 75 Ω Cable

DRIVING 75 Ω VIDEO CABLE WITH THE AD8124

When the RGB outputs must drive a 75 Ω line rather than a

high impedance load, an additional gain of two is required to

make up for the double termination loss (75 Ω source and load

terminations). There are two options available for this.

One option is to place the additional gain of 2 at the drive end

by using the AD8148 triple differential driver to drive the cable.

The AD8148 has a fixed gain of 4 instead of the usual gain of 2

and thereby provides the required additional gain of 2 without

having to add additional amplifiers to the signal chain. The

AD8148 also contains sync-on-common-mode encoding. If

sync-on-common-mode is not required, it can be deactivated

on the AD8148 by connecting its sync level input to ground.

The other option is to include a triple gain-of-2 buffer, such as the

ADA4862-3, on the AD8124 RGB outputs, as shown in Figure 25

for one channel (power supplies not shown). The ADA4862-3

provides the gain of 2 that compensates for the double-

termination loss.

ONE VIDEO

OUTPUT

FROM AD8124

ONE CHANNEL OF ADA4862-3

75Ω

Figure 25. Using the ADA4862-3 on AD8124 Outputs

DRIVING A CAPACITIVE LOAD

When driving a high impedance capacitive input, it is necessary

to place a small series resistor between each of the three AD8124

video outputs and the load to buffer the input capacitance of the

device being driven. Clearly, the resistor value must be small

enough to preserve the required bandwidth.

POWER SUPPLY FILTERING

External power supply filtering between the system power supplies

and the AD8124 is recommended in most applications to prevent

supply noise from contaminating the received signal as well as

to prevent unwanted feedback through the supplies that may

cause instability. Figure 26 shows that the AD8124 power supply

rejection decreases with increasing frequency. These plots are

for the lowest control settings and shift upward as the peaking

is increased.

–60

–50

–40

–30

–20

–10

0

10

+PSRR

–PSRR

100k

1M

10M

100M

FREQUENCY (Hz)

Figure 26. PSRR vs. Frequency