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AD8134ACPZ-R2 数据表(PDF) 4 Page - Analog Devices |
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AD8134ACPZ-R2 数据表(HTML) 4 Page - Analog Devices |
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4 / 20 page ![]() AD8134 Data Sheet Rev. B | Page 4 of 20 VS+ = 5 V, VS− = 0 V, HSYNC and VSYNC = VS−, RL,dm = 200 Ω @ 25°C, unless otherwise noted. TMIN to TMAX = −40°C to +85°C. Table 2. Parameter Conditions Min Typ Max Unit DIFFERENTIAL INPUT PERFORMANCE DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth VO = 0.2 V p-p 400 MHz −3 dB Large Signal Bandwidth VO = 2 V p-p 200 MHz Bandwidth for 0.1 dB Flatness VO = 0.2 V p-p 50 MHz Slew Rate VO = 2 V p-p, 25% to 75% 1400 V/µs Settling Time to 0.1% VO = 2 V step 14 ns Isolation Between Amplifiers f = 10 MHz, between Amplifier R and Amplifier G 75 dB DIFFERENTIAL INPUT CHARACTERISTICS Input Common-Mode Voltage Range 0 to 5 V Input Resistance Differential 1.5 kΩ Single-ended input 1.13 kΩ Input Capacitance Differential 1 pF DC CMRR ΔVOUT, dm/ΔVIN, cm, ΔVIN, cm = ±1 V −48 dB DIFFERENTIAL OUTPUT CHARACTERISTICS Differential Signal Gain ΔVOUT, dm/ΔVIN, dm, ΔVIN, dm = ±1 V 1.920 1.955 2.000 V/V Output Voltage Swing Each single-ended output VS− + 1.25 VS+ − 1.15 V Output Offset Voltage −24 3 +24 mV Output Offset Drift TMIN to TMAX ±30 µV/°C Output Balance Error f = 50 MHz −60 dB DC −70 −54 dB Output Voltage Noise f = 1 MHz 25 nV/√Hz Output Short-Circuit Current 90 mA COMMON-MODE SYNC PERFORMANCE SYNC DYNAMIC PERFORMANCE Slew Rate VOUT, cm = −1 V to +1 V; 25% to 75% 700 V/µs HSYNC AND VSYNC INPUTS Input Low Voltage VS− to 1.10 V Input High Voltage 1.40 to VS+ V SYNC LEVEL INPUT Input Voltage Range For linear operation V Setting to Achieve 0.5 V Pulse Levels VS− + 0.5 V Gain to Red Common-Mode Output ΔVO, cm/ΔVSYNC LEVEL 0.97 1.02 1.06 V/V Gain to Green Common-Mode Output ΔVO, cm/ΔVSYNC LEVEL 1.94 2.03 2.10 V/V Gain to Blue Common-Mode Output ΔVO, cm/ΔVSYNC LEVEL 0.96 1.02 1.05 V/V POWER SUPPLY Operating Range +4.5 ±6 V Quiescent Current 26.5 27.5 mA PSRR −54 −48 dB OUTPUT PULL-DOWN PERFORMANCE OPD Input Low Voltage VS− to VS+ − 3.85 V OPD Input High Voltage VS+ − 2.85 to VS+ V OPD Input Bias Current 63 80 µA OPD Assert Time 100 ns OPD De-Assert Time 100 ns Output Voltage When OPD Asserted Each output, OPD input @ VS+ VS− + 0.79 VS− + 0.82 V |
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