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AD8134ACPZ-R2 数据表(PDF) 13 Page - Analog Devices |
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AD8134ACPZ-R2 数据表(HTML) 13 Page - Analog Devices |
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13 / 20 page ![]() Data Sheet AD8134 Rev. B | Page 13 of 20 THEORY OF OPERATION Each differential driver in the AD8134 differs from a conventional op amp in that it has two outputs whose voltages move in opposite directions. Like an op amp, it relies on high open-loop gain and negative feedback to force these outputs to the desired voltages. The AD8134 drivers make it easy to perform single-ended-to-differential conversion, common- mode level-shifting, and amplification of differential signals. Previous differential drivers, both discrete and integrated designs, are based on using two independent amplifiers and two independent feedback loops, one to control each of the outputs. When these circuits are driven from a single-ended source, the resulting outputs are typically not well balanced. Achieving a balanced output has typically required exceptional matching of the amplifiers and feedback networks. DC common-mode level-shifting has also been difficult with previous differential drivers. Level-shifting has required the use of a third amplifier and feedback loop to control the output common-mode level. Sometimes, the third amplifier has also been used to attempt to correct an inherently unbalanced circuit. Excellent performance over a wide frequency range has proven difficult with this approach. Each of the AD8134 drivers uses two feedback loops to separately control the differential and common-mode output voltages. The differential feedback, set by the internal resistors, controls the differential output voltage only. The internal common-mode feedback loop controls the common-mode output voltage only. This architecture makes it easy to arbitrarily set the output common-mode level by simply applying a voltage to the VOCM input. The output common- mode voltage is forced, by internal common-mode feedback, to equal the voltage applied to the VOCM input, without affecting the differential output voltage. The VOCM inputs are not available to the user but are internally connected to the sync-on-common- mode circuitry. The AD8134 architecture results in outputs that are highly balanced over a wide frequency range without requiring external components or adjustments. The common-mode feedback loop forces the signal component of the output common-mode voltage to be zeroed. The result is nearly perfectly balanced differential outputs of identical amplitude that are exactly 180° apart in phase. DEFINITION OF TERMS Differential Voltage Differential voltage refers to the difference between two node voltages that are balanced with respect to each other. For example, in Figure 30, the output differential voltage (or equivalently output differential mode voltage) is defined as VOUT, dm = (VOP − VON) Common-mode voltage refers to the average of two node voltages with respect to a common reference. The output common-mode voltage is defined as 2 ) ( , ON OP cm OUT V V V Output Balance Output balance is a measure of how well the differential output signals are matched in amplitude and how close they are to exactly 180° apart in phase. Balance is easily determined by placing a well-matched resistor divider between the differential output voltage nodes and comparing the magnitude of the signal at the divider’s midpoint with the magnitude of the differential signal. By this definition, output balance error is the magnitude of the change in output common-mode voltage divided by the magnitude of the change in output differential- mode voltage in response to a differential input signal dm OUT cm OUT V V Error Balance Output , , ANALYZING AN APPLICATION CIRCUIT The AD8134 uses high open-loop gain and negative feedback to force its differential and common-mode output voltages to minimize the differential and common-mode input error voltages. The differential input error voltage is defined as the voltage between the differential inputs labeled VAP and VAN in Figure 30. For most purposes, this voltage can be assumed to be zero. Similarly, the difference between the actual output common-mode voltage and the voltage applied to VOCM can also be assumed to be zero. Starting from these two assumptions, any application circuit can be analyzed. CLOSED-LOOP GAIN The differential mode gain of the circuit in Figure 30 can be described by 2 G F IN,dm OUT,dm R R V V where RF = 1.5 kΩ and RG = 750 Ω nominally. RG VAP VAN VIP VIN + VIN, dm – VOCM VON VOP VOUT, dm RG RF RF RL, dm Figure 30. Circuit Definitions |
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