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AD8134ACPZ-R2 数据表(PDF) 6 Page - Analog Devices |
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AD8134ACPZ-R2 数据表(HTML) 6 Page - Analog Devices |
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6 / 20 page ![]() AD8134 Data Sheet Rev. B | Page 6 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 2 1 3 4 5 6 18 17 16 15 14 13 AD8134 TOP VIEW OPD VS– –IN R +IN R VS– SYNC LEVEL VS+ (SYNC) –IN B +IN B VS– –OUT R NOTES 1. EXPOSED PAD. THE EXPOSED PADDLE MUST BE SOLDERED TO A PAD ON TOP OF THE BOARD THAT IS CONNECTED TO AN INNER PLANE WITH SEVERAL THERMAL VIAS. –OUT B Figure 4. 24-Lead LFCSP Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 OPD Output Pull Down. 2, 5, 14, 21 VS− Negative Power Supply Voltage. 3 −IN R Inverting Input, Red Amplifier. 4 +IN R Noninverting Input, Red Amplifier. 6 −OUT R Negative Output, Red Amplifier. 7 +OUT R Positive Output, Red Amplifier. 8, 11, 17, 24 VS+ Positive Power Supply Voltage. 9 +OUT G Positive Output, Green Amplifier. 10 −OUT G Negative Output, Green Amplifier. 12 +OUT B Positive Output, Blue Amplifier. 13 −OUT B Negative Output, Blue Amplifier. 15 +IN B Noninverting Input, Blue Amplifier. 16 −IN B Inverting Input, Blue Amplifier. 18 SYNC LEVEL The voltage applied to this pin controls the amplitude of the sync pulses that are applied to the common-mode voltages. 19 HSYNC Horizontal Sync Pulse Input. 20 VSYNC Vertical Sync Pulse Input. 22 +IN G Noninverting Input, Green Amplifier. 23 −IN G Inverting Input, Green Amplifier. EPAD Exposed Pad. The exposed paddle must be soldered to a pad on top of the board that is connected to an inner plane with several thermal vias. |
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