Data Sheet

AD8141/AD8142

Rev. B | Page 21 of 24

AD8142

+

–

49.9Ω

1kΩ

38.3Ω

80.6Ω

–0.10V

–0.34V

1kΩ

2kΩ

+2.5V

–2.5V

2kΩ

100Ω

100Ω

UTP

49.9Ω

0.7V

–1.0V

–0.3V

–1.0V

–1.0V

–1.7V

0.7V

0V

75Ω

VIDEO

SOURCE

1.4V

–1.0V

–1.7V

–0.3V

0.5V

AD8142 KEY SIGNAL LEVELS ON SINGLE ±2.5V SUPPLIES

DRIVING MULTIPLE OUTPUTS

The AD8141/AD8142 can drive four parallel UTP cables (50 Ω

differential load) with only 1.5% reduction in output swing (see

Figure 46). As is expected, driving fewer parallel cables results in

less output swing reduction.

49.9Ω

100Ω

UTP

49.9Ω

100Ω

49.9Ω

100Ω

UTP

49.9Ω

100Ω

49.9Ω

100Ω

UTP

49.9Ω

100Ω

49.9Ω

100Ω

UTP

49.9Ω

100Ω

AD8141/AD8142

+

–

Figure 46. Driving Four UTP Cables in Parallel

VIDEO SYNC-ON-COMMON-MODE (AD8142)

In computer video applications, the horizontal and vertical sync

signals are most often separate from the video information signals.

For example, in typical computer monitor applications, the red,

green, and blue (RGB) color signals are transmitted over separate

cables, as are the vertical and horizontal sync signals. When

transmitting these types of video signals over long distances

on UTP cable, it is desirable to reduce the required number of

physical channels. One way to do this is to encode the vertical and

horizontal sync signals as weighted sums and differences of the

output common-mode signals. The RGB color signals are each

transmitted differentially over separate physical channels. The

fact that the differential and common-mode signals are orthogonal

allows the RGB color and sync signals to be separated at the

channel’s receiver.

Cat-5 type cable contains four balanced twisted-pair physical

channels that can support both differential and common-mode

signals. Transmitting typical computer monitor video over this

cable can be accomplished by using three of the twisted pairs for

the RGB and sync signals. Each color is transmitted differentially,

one on each of the three pairs. The encoded sync signals are

transmitted among the common-mode signals of each of the

three pairs. To minimize EMI from the sync signals, the common-

mode signals on each of the three pairs produced by the sync

encoding scheme induce electric and magnetic fields that, for

the most part, cancel each other. A conceptual block diagram

of the sync encoding scheme is presented in Figure 47. Because

the AD8142 has the sync encoding scheme implemented internally,

the user simply applies the horizontal and vertical sync signals

directly to the appropriate inputs. As described in the Theory of

Operation section, the AD8142 accepts ground-referenced logic-

level sync pulses (see Table 1 for the exact levels). In many cases,

the sync pulses can be applied directly from video card VGA

connector outputs.