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ADL5240ACPZ-R7 数据表(PDF) 24 Page - Analog Devices |
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ADL5240ACPZ-R7 数据表(HTML) 24 Page - Analog Devices |
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24 / 28 page ![]() ADL5240 Data Sheet Rev. A | Page 24 of 28 5 4 3 2 1 AMPIN 5 4 3 2 1 DSAOUT C8 C5 R15 R17 R14 R16 R2 C17 2 3 1 S1 VDD 24 1 8 7 6 5 3 23 22 20 19 18 17 2 21 4 U1 R1 5 4 3 2 1 AMPOUT C13 VCC C4 5 4 3 2 1 DSAIN C1 C14 C15 R11 R10 R13 R12 2 1 L1 VDD VDD D5 D4 D6 CLK_D0 DATA_D1 LE_D2 D3 0 DNI 1µF RED 1200pF 0.1µF 100pF DNI 0 DNI 0 0.1µF DNI 0 68pF 470nH 0 DNI 0 DNI ADL5240ACPZ RED DNI 0 DNI 0 0.1µF 0 DNI 0 DNI 100pF VDD NC NC DSAOUT NC NC NC NC NC NC NC NC DSAIN NC NC VDD AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND Figure 41. ADL5240 Evaluation Board Table 8. EvaluationBoard ConfigurationOptions Component Function/Notes Default Value C1, C2 Input/output dc blocking capacitors for DSA. C1, C2 = 100 pF C3, C4 Input/output dc blocking capacitors for AMP. C3, C4 = 0.1 µF C5, C6, C7 Power supply decoupling foramplifier. The bias associated with the AMPOUT pin is the most sensitive to noise because the bias is connected directly to the output. The smallest capacitor (C7) should be the closest to the AMPOUT pin. C5 = 1 µF C6 = 1.2 nF C7 = 68 pF C8 Power supply decoupling forthe DSA. C8 = 0.1 µF L1 The bias for the amplifier comes through L1 when VCC is connected to a 5 V supply. L1 should be high impedance for the frequency of operation while providing low resistance for the dc current. L1 = 470 nH R1, R2 Resistors to connect the supply for the amplifier and the DSA to the same VDD plane. R1, R2 = open R10, R11, R14, R15 These resistorsareused to terminate RF couplingonto thetraces andto close theloop. R10, R11, R14, R15 = 0 Ω R12, R13, R16, R17 R12 and R16 are replaced with capacitors, and R13 and R17 are replaced with 0 Ω to close the loop. R12, R13, R16, R17 = open S1 Switch to change between the serial mode and parallel mode of operation. Connect to supply for parallel mode and to ground for serial mode operation. S1 connected to ground |
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