9.3 GHz Latched Comparator

with RSPECL Output Stage

Data Sheet

HMC674LC3C/HMC674LP3E

Rev. K

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FEATURES

Equivalent input bandwidth: 9.3 GHz typical

Propagation delay: 85 ps typical

Overdrive and slew rate dispersion: 10 ps typical

Input signal minimum pulse width: 60 ps typical

Resistor programmable hysteresis

Differential latch control

Power dissipation: 140 mW typical

16-terminal, 3 mm × 3 mm, ceramic leadless chip carrier (LCC)

16-lead lead frame chip scale package (LFCSP)

APPLICATIONS

Automatic test equipment (ATE) applications

High speed instrumentation

Digital receiver systems

Pulse spectroscopy

High speed trigger circuits

Clock and data restoration

FUNCTIONAL BLOCK DIAGRAM

12

11

10

1

3

4

9

2

VTP

50Ω

50Ω

INP

INN

VTN

Q

Q

PACKAGE

BASE

HMC674LC3C/HMC674LP3E

Figure 1. HMC674LC3C/HMC674LP3E Functional Block Diagram

GENERAL DESCRIPTION

The HMC674LC3C/HMC674LP3E are silicon germanium

(SiGe), monolithic, ultrafast comparators that feature reduced

swing positive emitter-coupled logic (RSPECL) output drivers

and latch inputs. These comparators support 10 Gbps operation

and provide 85 ps propagation delay and an input signal

minimum pulse width of 60 ps with 0.2 ps rms of random jitter

(RJ). Overdrive and slew rate dispersion is typically 10 ps, making

the HMC674LC3C/HMC674LP3E ideal for a wide range of

applications from ATE to broadband communications. The

RSPECL output stages directly drive 400 mV into a 50 Ω resistor

termination voltage (see Figure 16). The HMC674LC3C/

HMC674LP3E feature a high speed latch and programmable

hysteresis. These devices can operate in either latch mode or as

a tracking comparator.