HMC674LC3C/HMC674LP3E

Data Sheet

Rev. K | Page 12 of 14

APPLICATION CIRCUITS

See Figure 15 for the typical application circuit, Table 9 for the bill of materials, and Figure 16 for the output interfacing application circuit.

J8

GND

12

11

10

1

3

4

9

2

50Ω

50Ω

PACKAGE

BASE

C6

100pF

TP4

C5

100pF

C7

330pF

C8

100pF

JP1

C13

4.7µF

J1

J1

C12

4.7µF

C2

100pF

C3

100pF

C4

330pF

C14

4.7µF

C11

330pF

C1

100pF

J1

TP3

HYS

TP1

VTP

J2

INP

J6

LE

J3

INN

J4

Q

C9

100pF

C10

100pF

JP2

TP2

VTN

J7

LE

J5

Q

J1

Figure 15. Typical Application Circuit

Table 9. Bill of Materials for the Evaluation PCB (125929-3)

Item

Description

J1

Eight position vertical header

J2 to J7

2.92 mm, 40 GHz jacks

J8

Terminal strip, single row, 3-pin surface mount (SMT)

JP1, JP2

Two position vertical header

C1 to C3, C5, C6, C8 to C10

100 pF capacitors, 0402 package

C4, C7, C11

330 pF capacitors, 0402 package

C12 to C14

4.7 µF tantalum capacitors

TP1 to TP4

DC pin, swage mount test points

U1

HMC674LC3C/HMC674LP3E comparator

PCB

1

Reference this number when ordering complete evaluation PCB.

50

Ω

50

Ω

CH1

50

Ω

CH2

Q

Q

~0.9V

OSCILLOSCOPE INPUT

50

Ω

Figure 16. Output Interfacing Application Circuit, Output to Oscilloscope