AD9914SLASHPCBZ datasheet(38/45 Pages) AD

38 / 45 page

AD9914

Data Sheet

Rev. F | Page 38 of 45

Name (Serial

Address)

Bit Range

(Parallel

Address)

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Value

(Hex)1

Profile 7 (P7)

Phase/

Amplitude

(0x1A)

[7:0]

(0x68)

Phase Offset Word 7[7:0]

N/A

[15:8]

(0x69)

Phase Offset Word 7[15:8]

N/A

[23:16]

(0x6A)

Amplitude Scale Factor 7[7:0]

N/A

[31:24]

(0x6B)

Open

Amplitude Scale Factor 7[11:8]

N/A

USR0 (0x1B)

[7:0]

(0x6C)

Requires register default value settings (0x00)

0x00

[15:8]

(0x6D)

Requires register default value settings (0x08)

0x08

[23:16]

(0x6E)

Requires register default value settings (0x00)

0x00

[31:24]

(0x6F)

Open

PLL lock

Read

only

1 A master reset is required after power up. The master reset returns the internal registers to the default values.

2 The DAC CAL enable bit must be manually set and then cleared after each power-up and every time REF CLK or the internal system clock is changed. This initiates an

internal calibration routine to optimize the setup and hold times for internal DAC timing. Failure to calibrate degrades ac performance or makes the device nonfunctional.

AD9914/PCBZ 数据表(PDF) 38 Page - Analog Devices

AD9914/PCBZ 数据表(HTML) 38 Page - Analog Devices

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