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AD9914/PCBZ 数据表(PDF) 13 Page - Analog Devices

部件名 AD9914/PCBZ
功能描述  3.5 GSPS Direct Digital Synthesizer 12-Bit DAC
PDF  45 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9914/PCBZ 数据表(HTML) 13 Page - Analog Devices

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Data Sheet
AD9914
Rev. F | Page 13 of 45
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
START 0Hz
175MHz/DIV
STOP 1.75GHz
Figure 10. Wideband SFDR at 1396.5 MHz,
SYSCLK = 3.5 GHz (SYSCLK PLL Bypassed)
0
–80
0
0.05
0.10
0.15
0.40
0.35
0.30
0.25
0.20
fC/fS
–70
–60
–50
–40
–30
–20
–10
Figure 11. Wideband SFDR vs. Normalized fOUT
SYSCLK = 3.5 GHz
0
–80
0
0.05
0.10
0.15
0.40
0.35
0.30
0.25
0.20
fC/fS
–70
–60
–50
–40
–30
–20
–10
SYSCLK = 2.7GHz
SYSCLK = 2.8GHz
SYSCLK = 2.9GHz
SYSCLK = 3.0GHz
SYSCLK = 3.1GHz
SYSCLK = 3.2GHz
SYSCLK = 3.3GHz
SYSCLK = 3.4GHz
SYSCLK = 3.5GHz
SYSCLK = 1.5GHz
SYSCLK = 1.6GHz
SYSCLK = 1.7GHz
SYSCLK = 1.8GHz
SYSCLK = 1.9GHz
SYSCLK = 2.0GHz
SYSCLK = 2.1GHz
SYSCLK = 2.2GHz
SYSCLK = 2.3GHz
SYSCLK = 2.4GHz
SYSCLK = 2.5GHz
SYSCLK = 2.6GHz
Figure 12. Wideband SFDR vs. Normalized fOUT,
SYSCLK = 2.5 GHz to 3.5 GHz
CENTER 1396.5MHz
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
50kHz/DIV
SPAN 500kHz
Figure 13. Narrow-Band SFDR at 1396.5 MHz,
SYSCLK = 3.5 GHz (SYSCLK PLL Bypassed)
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY OFFSET (Hz)
–70
–90
–80
–100
–110
–120
–130
–140
–150
–160
–170
SMA
SMA AND
ADCLK925
Figure 14. Absolute Phase Noise of REF CLK Source Driving AD9914
Rohde & Schwarz SMA100 Signal Generator at 3.5 GHz Buffered by Series
ADCLK925
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY OFFSET (Hz)
–70
–90
–80
–100
–110
–120
–130
–140
–150
–160
–170
1396MHz
696MHz
427MHz
171MHz
Figure 15. Absolute Phase Noise Curves of DDS Output at 3.5 GHz Operation



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