AD5544/AD5554

Data Sheet

Rev. H | Page 20 of 24

APPLICATIONS INFORMATION

The AD5544/AD5554 are, inherently, two-quadrant multiplying

DACs. That is, they can be easily set up for unipolar output

operation. The full-scale output polarity is the inverse of the

reference input voltage.

In some applications, it may be necessary to generate the full

four-quadrant multiplying capability or a bipolar output swing.

This is easily accomplished using an additional external ampli-

fier (A2) configured as a summing amplifier (see Figure 27).

A2

A1

ONE CHANNEL

AD5544

10k

Ω

10k

Ω

5k

Ω

AD588

10V

DIGITAL INTERFACE CONNECTIONS

OMITTED FOR CLARITY.

Figure 27. Four-Quadrant Multiplying Application Circuit

In this circuit, the first and second amplifiers (A1 and A2)

provide a total gain of 2, which increases the output voltage span

to 20 V. Biasing the external amplifier with a 10 V offset from

the reference voltage results in a full four-quadrant multiplying

circuit. The transfer equation of this circuit shows that both

negative and positive output voltages are created as the input

REF

OUT

V

D

V

−

×













−1

768

,

32

(for the AD5544)

(3)

REF

OUT

V

D

V

−

×













−1

8192

(for the AD5554)

(4)

REFERENCE SELECTION

When selecting a reference for use with the AD55xx series

of current output DACs, pay attention to the output voltage,

temperature coefficient specification of the reference. Choosing

a precision reference with a low output temperature coefficient

minimizes error sources. Table 10 lists some of the references

available from Analog Devices, Inc., that are suitable for use

with this range of current output DACs.

AMPLIFIER SELECTION

The primary requirement for the current-steering mode is an

amplifier with low input bias currents and low input offset voltage.

Because of the code-dependent output resistance of the DAC,

the input offset voltage of an op amp is multiplied by the variable

gain of the circuit. A change in this noise gain between two

adjacent digital fractions produces a step change in the output

voltage due to the amplifier’s input offset voltage. This output

voltage change is superimposed upon the desired change in

output between the two codes and gives rise to a differential

linearity error, which, if large enough, can cause the DAC to be

nonmonotonic.

The input bias current of an op amp also generates an offset at

the voltage output because of the bias current flowing in the

Common-mode rejection of the op amp is important in voltage-

switching circuits because it produces a code-dependent error

at the voltage output of the circuit.

Provided that the DAC switches are driven from true wideband,

Consequently, the slew rate and settling time of a voltage-switching

DAC circuit is determined largely by the output op amp. To obtain

minimum settling time in this configuration, minimize capacitance

the DAC. This is done by using low input capacitance buffer

amplifiers and careful board design.

Analog Devices offers a wide range of amplifiers for both precision

dc and ac applications, as listed in Table 11 and Table 12.