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PIFE32251B-R47MS 数据表(PDF) 58 Page - Texas Instruments |
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PIFE32251B-R47MS 数据表(HTML) 58 Page - Texas Instruments |
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58 / 96 page ![]() 58 TPS65094 SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TPS65094 Detailed Description Copyright © 2015–2019, Texas Instruments Incorporated 6.6.13 DISCHCNT1: Discharge Control1 Register (offset = 40h) [reset = 0101 0101] All xx_DIS[1:0] bits automatically set to 00 when the corresponding VR is enabled. Discharge resistance values listed here are approximate. Figure 6-31. DISCHCNT1 Register (offset = 40h) [reset = 0101 0101] Bit 7 6 5 4 3 2 1 0 Bit Name BUCK4_DIS[1] BUCK4_DIS[0] BUCK3_DIS[1] BUCK3_DIS[0] BUCK2_DIS[1] BUCK2_DIS[0] BUCK1_DIS[1] BUCK1_DIS[0] TPS65094x 0 1 0 1 0 1 0 1 Access R/W R/W R/W R/W R/W R/W R/W R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-24. DISCHCNT1 Register Field Descriptions Bit Field Type Reset Description 7–6 BUCK4_DIS[1:0] R/W 01 BUCK4 discharge resistance 00: No discharge 01: 100 Ω 10: 200 Ω 11: 500 Ω 5–4 BUCK3_DIS[1:0] R/W 01 BUCK3 discharge resistance 00: No discharge 01: 100 Ω 10: 200 Ω 11: 500 Ω 3–2 BUCK2_DIS[1:0] R/W 01 BUCK2 discharge resistance 00: No discharge 01: 100 Ω 10: 200 Ω 11: 500 Ω 1–0 BUCK1_DIS[1:0] R/W 01 BUCK1 discharge resistance 00: No discharge 01: 100 Ω 10: 200 Ω 11: 500 Ω |
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