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GD25Q80CSIG 数据表(PDF) 4 Page - GigaDevice Semiconductor (Beijing) Inc.

部件名 GD25Q80CSIG
功能描述  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  67 Pages
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制造商  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
网页  http://www.gigadevice.com/
标志 GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25Q80CSIG 数据表(HTML) 4 Page - GigaDevice Semiconductor (Beijing) Inc.

  GD25Q80CSIG Datasheet HTML 1Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 2Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 3Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 4Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 5Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 6Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 7Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 8Page - GigaDevice Semiconductor (Beijing) Inc. GD25Q80CSIG Datasheet HTML 9Page - GigaDevice Semiconductor (Beijing) Inc. Next Button
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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25Q80C
4
1. FEATURES
8M-bit Serial Flash
Fast Program/Erase Speed
-1024K-Byte
-Page Program time: 0.6ms typical
-256 Bytes per programmable page
-Sector Erase time: 45ms typical
-Block Erase time: 0.15/0.25s typical
Standard, Dual, Quad SPI
-Chip Erase time: 4s typical
-Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
-Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#
Flexible Architecture
-Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
-Uniform Sector of 4K-Byte
-Uniform Block of 32/64K-Byte
High Speed Clock Frequency
-120MHz for fast read with 30PF load
Low Power Consumption
-Dual I/O Data transfer up to 240Mbits/s
-
1μA typical deep power down current
-Quad I/O Data transfer up to 480Mbits/s
-
1μA typical standby current
Software/Hardware Write Protection
Advanced Security Features
-Write protect all/portion of memory via software
-128-Bit Unique ID for each device
-Enable/Disable protection with WP# Pin
-4x256-Byte security registers with OTP locks
-Top/Bottom Block Protection
-Discoverable parameters (SFDP) register
Allows XIP (execute in place) Operation
Single Power Supply Voltage
-Continuous Read With 8/16/32/64-Byte Wrap
-Full voltage range: 2.7~3.6V
Minimum 100,000 Program/Erase Cycles
Data retention
-20-year data retention typical



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