GD25Q80CSIG datasheet(49/67 Pages) GIGADEVICE

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3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q80C

tDP

CS# High To Deep Power-Down Mode

μs

tRES1

CS# High To Standby Mode Without Electronic Signature

Read

μs

tRES2

CS# High To Standby Mode With Electronic Signature

Read

μs

tSUS

CS# High To Next Command After Suspend

μs

tRS

Latency Between Resume And Next Suspend

100

μs

tRST

CS# High To Next Command After Reset (Except From

Erase)

μs

tRST_E

CS# High To Next Command After Reset (From Erase)

Write Status Register Cycle Time

tBP1

Byte Program Time (First Byte)

μs

tBP2

Additional Byte Program Time (After First Byte)

2.5

μs

tPP

Page Programming Time

0.6

2.4

tSE

Sector Erase Time (4K Bytes)

150/300(1)

tBE1

Block Erase Time (32K Bytes)

0.15

0.8/1.2(2)

tBE2

Block Erase Time (64K Bytes)

0.25

1.2/2.0(3)

tCE

Chip Erase Time (GD25Q80C)

Note:

1. Max Value 4KB tSE with<50K cycles is 150ms and >50K & <100k cycles is 300ms.

2. Max Value 32KB tBE with<50K cycles is 0.8s and >50K & <100k cycles is 1.2s.

3. Max Value 64KB tBE with<50K cycles is 1.2s and >50K & <100k cycles is 2.0s.

4. Typical values given for TA=25°C.

5. Value guaranteed by design and/or characterization, not 100% tested in production.

GD25Q80CSIG 数据表(PDF) 49 Page - GigaDevice Semiconductor (Beijing) Inc.

GD25Q80CSIG 数据表(HTML) 49 Page - GigaDevice Semiconductor (Beijing) Inc.

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