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GD5F1GQ4REFJS 数据表(PDF) 17 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD5F1GQ4REFJS 数据表(HTML) 17 Page - GigaDevice Semiconductor (Beijing) Inc. |
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17 / 60 page ![]() SPI(x1/x2/x4) NAND Flash 1G 17 8 READ OPERATIONS 8.1 Page Read The PAGE READ (13H) command transfers the data from the NAND Flash array to the cache register. The command sequence is as follows: • 13H (PAGE READ to cache) • 0FH (GET FEATURES command to read the status) • 03H or 0BH (Read from cache)/3BH (Read from cache x2)/6BH (Read from cache x4)/BBH (Read from cache dual IO)/EBH (Read from cache quad IO) The PAGE READ command requires a 24-bit address. After the block/page addresses are registered, the device starts the transfer from the main array to the cache register, and is busy for tRD time. During this time, the GET FEATURE (0FH) command can be issued to monitor the status. Followed the page read operation, the RANDOM DATA READ (03H/0BH/3BH/6BH/BBH/EBH) command must be issued in order to read out the data from cache. The output data starts at the initial address specified in the command, once it reaches the ending boundary of the 2176-byte section, the output will wrap around the beginning boundary automatically until CS# is pulled high to terminate this operation. Refer waveforms to view the entire READ operation. 8.2 Page Read to Cache (13H) Figure8-1. Page Read to cache Sequence Diagram Command 0 1 2 3 4 5 6 7 13H CS# SCLK SI SO High-Z 8 9 10 28 29 30 31 3 2 1 0 23 22 21 24-bit address CS# Get Feature 0 1 2 3 4 5 6 7 0FH CS# SLK SI SO High-Z 8 9 10 11 12 13 14 15 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 MSB 1 byte address Data byte MSB SCLK SI SO tCS 16 17 18 19 20 21 22 23 24 |
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