THCV236 datasheet(21/68 Pages) CEL

21 / 68 page

THCV235_THCV236_Rev.3.40_E

THine Electronics, Inc.

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Security E

Table 18. Sub-Link Field BET Operation Setting

THCV235/THCV236

Common Setting

THCV235

Setting

THCV236

Setting

Condition

PDN0

PDN1

SUBMODE

BET

BET_SEL

MSSEL

LATEN

MSSEL

LATEN

Main-Link

Sub-Link

Output Latch

Select

(*1)

(*3)

(*5)

Power

Down

Field BET

Operation

Latched

Result

(*5)

(*2)

(*4)

(*5)

*1 Pin setting. Note that BET pin should be 0 at power on sequence.

*2 THCV235: Register setting (0x53 bit1), THCV236: Pin setting. Note that BET pin should be 0 at power on sequence.

*3 When PDN0=0, PDN1=1, SUBMODE=1 and BET=1, BET_SEL is set to 1 automatically.

*4 Register setting (0x53 bit0, Default 0)

*5 Forbidden 0 setting

Table 19. Sub-Link Slave device Sub-Link Field BET Result

BETOUT

Output

Bit Error Occurred

No Error

THCV235

THCV236

CLKIN

BET=1

(Pin or

Test Pattern

Checker

Test Pattern

Generator

Data inputs

are ignored

RF/BETOUT

Test Point

for

Field BET

LATEN/SD3/AIN1/GPIO0 = 0 or 1

BET_SEL=0

(Register)

BET=1

(Pin)

BET_SEL=0

(Register)

Main-Link

Figure 6. Main-Link Field BET Configuration

Figure 7. Sub-Link Field BET Configuration

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