ADMV1013ACCZ-R7 datasheet(6/39 Pages) AD

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ADMV1013

Data Sheet

Rev. A | Page 6 of 39

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

Supply Voltage

VCC_DRV, VCC2_DRV, VCC_AMP2,

VCC_ENV, VCC_AMP1, VCC_BG2,

VCC_BG, VCC_MIXER

4.3 V

DVDD, VCC_VVA

2.3 V

IF Input Power

5 dBm

I/Q Input Power

5 dBm

LO Input Power

9 dBm

Maximum Junction Temperature

125°C

Maximum Power Dissipation1

2.9 W

Lifetime at Maximum Junction Temperature (TJ)

1 ×106 hours

Operating Case Temperature Range

−40°C to +85°C

Storage Temperature Range

−55°C to +125°C

Lead Temperature (Soldering 60 sec)

260°C

Moisture Sensitivity Level (MSL) Rating2

MSL3

Electrostatic Discharge (ESD) Sensitivity

Human Body Model (HBM)

1250 V

Field Induced Charged Device Model

(FICDM)

750 V

The maximum power dissipation is a theoretical number calculated by

(TJ − 85°C)/θJC_TOP.

Based on IPC/JEDEC J-STD-20 MSL classifications.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is the natural convection junction to ambient thermal

resistance measured in a one cubic foot sealed enclosure. θJC

is the junction to case thermal resistance.

θJA and θJC must only be used to compare thermal performance

of different packages if all test conditions listed are similar to

JEDEC specifications. Instead,

ѰJTandѰJBcanbeusedto

calculate the junction temperature of the device using the

following equations:

TJ = (P ×

ѰJT)+TTop(Equation1)

TTop: Refers to package top temperature (°C). TTop is measured at

the top-center of the package.

ѰJT:Referstojunction-to-topthermalcharacterizationnumber.

P: Refers to total power dissipation in the chip (W).

TJ = (P ×

ѰJB)+TBoard(Equation2)

TBoard: Refers to board temperature measured on the mid-point

of the longest side of the package no more than 1 mm from the

edge of the package body (°C).

ѰJB:Referstojunction-to-boardthermalcharacterizationnumber.

P: Refers to total power dissipation in the chip (W).

As stated in JEDEC51-12, Equation 1 and Equation 2 must only

be used when no heat sink/heat spreader is present. When a

heat sink/heat spreader is added, estimating and calculating

junction temperature can be achieved using θJC_TOP.

Table 4. Thermal Resistance

Package Type1

θJA2

θJC_TOP3

θJB4

ΨJT5

ΨJB6

Unit

CC-40-5

13.8

11.1

6.4

13.8

°C/W

The thermal resistance values specified in Table 4 are simulated based on

JEDEC specifications, unless specified otherwise, and must be used in

compliance with JESD51-12.

θJA is the junction to ambient thermal resistance in a natural convection,

JEDEC environment.

θJC_TOP is the junction to case (top) JEDEC thermal resistance.

θJB is the junction to board JEDEC thermal resistance.

ΨJT is the junction to top JEDEC thermal characterization parameter.

ΨJB is the junction to board JEDEC thermal characterization parameter.

ESD CAUTION

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