ADMV1014ACCZ-R7 datasheet(6/42 Pages) AD

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ADMV1014

Data Sheet

Rev. A | Page 6 of 42

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

Supply Voltage

VCC_IF_BB, VCC_VGA, VCC_LNA_3P3,

VCC_MIXER, VCC_BG, VCC_QUAD, DVDD

4.3 V

VCC_VVA, VCC_LNA_1P5

2.3 V

RF Input Power

0 dBm

LO Input Power

9 dBm

Maximum Junction Temperature

125°C

Maximum Power Dissipation1

2.17 W

Lifetime at Maximum Junction Temperature (TJ)

1 ×106 hours

Operating Case Temperature Range

−40°C to +85°C

Storage Temperature Range

−55°C to +125°C

Lead Temperature (Soldering 60 sec)

260°C

Moisture Sensitivity Level (MSL) Rating2

MSL3

Electrostatic Discharge (ESD) Sensitivity

Human Body Model (HBM)

3000 V

Field Induced Charged Device Model

(FICDM)

750 V

1 The maximum power dissipation is a theoretical number calculated by

(TJ − 85°C)/θJC_TOP.

2 Based on IPC/JEDEC J-STD-20 MSL classifications.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is the natural convection junction to ambient thermal

resistance measured in a one cubic foot sealed enclosure. θJC is

the junction to case thermal resistance.

Only use θJA and θJC to compare the thermal performance of

different packages when all test conditions listed are similar to

JEDEC specifications. Otherwise, use

ѰJTandѰJBtocalculate

the device junction temperature using the following equations:

TJ = (P × ѰJT) + TTOP

(1)

where:

TTOP is package top temperature (°C). TTOP is measured at the

top center of the package.

ѰJT is the junction to top thermal characterization number.

P is the total power dissipation in the chip (W).

TJ = (P × ѰJB) + TBOARD

(2)

where:

TBOARD is the board temperature measured on the midpoint of

the longest side of the package no more than 1 mm from the

edge of the package body (°C).

ѰJB is the junction to board thermal characterization number.

P is the total power dissipation in the chip (W).

As stated in JEDEC51-12, only use Equation 1 and Equation 2

when no heat sink or heat spreader is present. When a heat sink

or heat spreader is added, use θJC_TOP to estimate or calculate the

junction temperature.

Table 4. Thermal Resistance

Package

Type1

θJA2

θJC_TOP3

θJB4

ΨJT5

ΨJB6

Unit

CC-32-6

33.6

18.4

13.3

4.9

12.6

°C/W

1 The thermal resistance values specified in Table 4 are simulated based on

JEDEC specifications, unless specified otherwise, and must be used in

compliance with JESD51-12.

2 θJA is the junction to ambient thermal resistance in a natural convection,

JEDEC environment.

3 θJC_TOP is the junction to case (top) JEDEC thermal resistance.

4 θJB is the junction to board JEDEC thermal resistance.

5 ΨJT is the junction to top JEDEC thermal characterization parameter.

6 ΨJB is the junction to board JEDEC thermal characterization parameter

ESD CAUTION

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