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VCBU68WMCE30 数据表(PDF) 21 Page - Texas Instruments

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部件名 VCBU68WMCE30
功能描述  Digital Media System-on-Chip (DMSoC)
PDF  208 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

VCBU68WMCE30 数据表(HTML) 21 Page - Texas Instruments

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TMS320DM368
www.ti.com
SPRS668C
– APRIL 2010 – REVISED JUNE 2011
2.8
Terminal Functions
Table 2-5 provides a complete pin description list which shows external signal names, the associated pin
(ball) numbers along with the mechanical package designator, the pin type, whether the pin has any
internal pullup or pulldown resistors, and a functional pin description. For more detailed information on
device configuration, peripheral selection, multiplexed/shared pins, and debugging considerations, see
Section 3.
Table 2-5. Pin Descriptions
Name
BGA
Type
Group
Power
IPU
Reset
Description(4)
ID
(1)
Supply(2)
IPD(3)
State
CIN7(5)
A15
I/O
ISIF
VDD_ISIF18_33
IPD
Input
Standard ISIF Analog Front End (AFE): raw[7]
YCC 16-bit: time multiplexed between chroma:
CB/CR[07]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[07]
CIN6(5)
C15
I/O
ISIF
VDD_ISIF18_33
IPD
Input
Standard ISIF Analog Front End (AFE): raw[6]
YCC 16-bit: time multiplexed between chroma:
CB/CR[06]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[06]
CIN5(5)
B16
I/O
ISIF
VDD_ISIF18_33
IPD
Input
Standard ISIF Analog Front End (AFE): raw[5]
YCC 16-bit: time multiplexed between chroma:
CB/CR[05]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[05]
CIN4(5)
A16
I/O
ISIF
VDD_ISIF18_33
IPD
Input
Standard ISIF Analog Front End (AFE): raw[4]
YCC 16-bit: time multiplexed between chroma:
CB/CR[04]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[04]
CIN3 (5)
A17
I/O
ISIF
VDD_ISIF18_33
IPD
Input
Standard ISIF Analog Front End (AFE): raw[3]
YCC 16-bit: time multiplexed between chroma:
CB/CR[03]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[03]
CIN2(5)
C16
I/O
ISIF
VDD_ISIF18_33
IPD
Input
Standard ISIF Analog Front End (AFE): raw[2]
YCC 16-bit: time multiplexed between chroma:
CB/CR[02]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[02]
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2)
Specifies the operating I/O supply voltage for each signal. See Section 6.3
, Power Supplies for more detail.
(3)
PD = pull-down, PU = pull-up. (To pull up a signal to the opposite supply rail, a 1 k
Ω resistor should be used.)
(4)
To reduce EMI and reflections, depending on the trace length, approximately 22
Ω to 50 Ω damping resistors are recommend on the
following outputs placed near the device: YOUT(0-7),COUT(0-7), HSYNC,VSYNC,LCD_OE,FIELD, and,VCLK. The trace lengths should
be minimized.
(5)
The Y input (YIN[7:0]) and C input (CIN[7:0]) buses can be swapped by programming the field bit YCINSWP in the VPFE CCD
Configuration (CCDCFG) register (0x01C7 0136h).
IF YCINSWP bit is 0 (default) YIN[7:0] = Y signal / CIN[7:0] = C signal .
IF YCINSWP bit is 1 YIN[7:0] = C signal / CIN[7:0] = Y signal
For more information, see the TMS320DM36x Video Processing Front End (VPFE) Reference Guide (literature number SPRUFG8).
Copyright
© 2010–2011, Texas Instruments Incorporated
Device Overview
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