VCBU68WMCE30 datasheet(7/208 Pages) TI1

7 / 208 page

TMS320DM368

www.ti.com

SPRS668C

– APRIL 2010 – REVISED JUNE 2011

Device Overview

2.1

Device Characteristics

Table 2-1 provides an overview of the DMSoC. The table shows significant features of the device,

including the peripherals, capacity of on-chip RAM, ARM operating frequency, the package type with pin

count, etc.

Table 2-1. Characteristics of the Processor

HARDWARE FEATURES

DEVICE

DDR2 / mDDR Memory Controller

DDR2 / mDDR (16-bit bus width)

Asynchronous (8/16-bit bus width) RAM,

Asynchronous EMIF (AEMIF)

Flash (NOR, NAND, OneNAND)

Two MMC/SD

Flash Card Interfaces

One SmartMedia/xD

64 independent DMA channels

EDMA

Eight QDMA channels

Four 64-Bit General Purpose (each

Timers

configurable as two separate 32-bit timers)

One 64-Bit Watch Dog

UART

Two (one with RTS and CTS flow control)

SPI

Five (each supports two slave devices)

Peripherals

I2C

One (Master/Slave)

Not all peripherals pins are

10/100 Ethernet MAC with Management Data I/O

One

available at the same time (For

Multi-Channel Buffered Serial Port [McBSP]

One McBSP

more detail, see the Device

Configuration section).

Power Management and Real Time Clock Subsystem

RTC (32.768kHz), GPIO

(PRTCSS)

Key Scan

4 x 4 Matrix, 5 x 3 Matrix

Voice Codec

One

Analog-to-Digital Converter (ADC)

6-channel, 10-bit Interface

General-Purpose Input/Output Port

Up to 104

Pulse width modulator (PWM)

Four outputs

One Input (VPFE)

Configurable Video Ports

One Output (VPBE)

High Speed Device

USB 2.0

High Speed Host

On The Go (HS-USB-OTG)

Wireless Interfaces

Through SDIO

RTO

Four Channels

ARM

On-Chip CPU Memory

Organization

16-KB I-cache, 8-KB D-cache, 32-KB RAM,

16-KB ROM

See Section 6.27.1, JTAG Register

JTAG BSDL_ID

JTAGID register (address location: 0x01C4 0028)

Description(s)

CPU Frequency (Maximum)

MHz

ARM: 432-MHz

Core (V)

1.35 V

Voltage

I/O (V)

3.3 V, 1.8 V

Reference frequency options

19.2 MHz, 24 MHz, 27 MHz, 36 MHz

PLL Options

Configurable PLL controller

PLL bypass, programmable PLL

BGA Package

13 x 13 mm

338-Pin BGA (ZCE)

Process Technology

65 nm

Device Overview

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Product Folder Link(s): TMS320DM368

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