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LP5550 数据表(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LP5550
功能描述  PowerWise Technology Compliant Energy Management Unit
PDF  25 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LP5550 数据表(HTML) 6 Page - National Semiconductor (TI)

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LDO1 (PLL/Fixed Voltage) Characteristics Unless otherwise noted, V
BAT1,2,SW, RESETN,
ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type
apply over the entire junction temperature range for operation, -40 to +125˚C. (Notes 2, 7, 8) (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
PSRR
Power Supply Ripple Rejection
Ratio
f = 1kHz,C
OUT = 2.2µF
56
dB
f = 10kHz,C
OUT = 2.2µF
36
dB
C
OUT
Output CapacitanceOutput
Capacitor ESR
0µA
≤ I
OUT
≤ 100mA
1
2.2
20
µF
5
500
m
Ω
t
START-UP
Start-Up Time from Shut-down C
OUT = 1µF, IOUT = 100mA
54
µs
LDO2 (I/O Voltage) Characteristics Unless otherwise noted, V
BAT1,2,SW , RESETN, ENABLE = 3.6V.
Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the entire
junction temperature range for operation, -40 to +125˚C. (Notes 2, 7, 8)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
OUT
Accuracy
Output Voltage
1mA
≤ I
OUT
≤ 250mA,V
OUT = 3.3V,
V
OUT +0.4V
≤ V
BAT1,2,SW
≤ 5.5V
-3%
3.3
3%
V
V
OUT Range
Programmable Output Voltage
Range
0µA
≤ I
OUT
≤ 250mA, 1.5-2.3V
=100mV step, 2.5V, 2.8V, 3.0V and
3.3V
1.5
3.3
3.3
V
I
OUT
Recommended Output Current V
OUT +0.4V
≤ V
BAT1,2,SW
≤ 5.5V
250
mA
Output Current Limit
V
OUT =0V
740
Dropout Voltage(Note 10)
I
OUT = 125mA
70
260
mV
I
Q
Quiescent Current
I
OUT = 0mA (Note 11)
55
60
µA
∆V
OUT
Line Regulation
V
OUT +0.4V
≤ V
BAT1,2,SW
≤ 5.5V,
I
OUT = 125mA
-0.0125
0.0125 %/V
Load Regulation
V
IN = 3.6V, 1mA
≤ I
OUT
≤ 250mA
-0.011
0.011
%/mA
Line Transient Regulation
3.6V
≤ V
IN
≤ 3.9V, T
RISE,FALL =10us
24
mV
Load Transient Regulation
V
IN = 3.6V, 25mA
≤ I
OUT
≤ 225 mA,
T
RISE,FALL = 100 ns
246
mV
eN
Output Noise Voltage
10Hz
≤ f ≤ 100kHz,C
OUT = 4.7µF
0.120
mVRMS
PSRR
Power Supply Ripple Rejection
Ratio
f = 1kHz, C
OUT = 4.7µF
46
dB
f = 10kHz, C
OUT = 4.7µF
34
C
OUT
Output Capacitance
0µA
≤ I
OUT
≤ 250mA
2
4.7
20
µF
Output Capacitor ESR
5
500
m
Ω
t
START-UP
Start-Up Time from Shut-down C
OUT = 4.7µF, IOUT = 250mA
144
µs
LDO3 (Memory Retention Voltage) Characteristics Unless otherwise noted, V
BAT1,2,SW ,
RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in bold-
face type apply over the entire junction temperature range for operation, -40 to +125˚C. (Notes 2, 7, 8)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
OUT
Accuracy
Output Voltage Active state:
Tracking V
AVS
I
OUT
≤ 50mA,VOUT = 1.2V, 3.0V ≤
V
BAT1,2,SW
≤ 5.5V
-3%
1.2
3%
V
Sleep state: Memory retention
voltage regulation
I
OUT
≤ 5mA,V
OUT = 1.2V, 3.0V
≤
V
BAT1,2,SW
≤ 5.5V
-3%
1.2
3%
V
V
OFFSET
Active State Buffer offset (=
V
O3-VFB)
I
OUT =50mA,
V
OUT = 0.6 V
13
mV
I
OUT =50mA,
V
OUT = 1.2V
28
mV
V
OUT Range
Programmable Output Voltage
Range (Sleep state)
0µA
≤ I
OUT
≤ 5mA, Programming
Resolution=50mV
0.6
1.2
1.35
V
I
Q
Quiescent Current
Active mode, I
OUT = 10µA (Note 11)
33
44
µA
Sleep mode, I
OUT = 10µA (Note 11)
10
16
µA
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