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LP5550 数据表(PDF) 7 Page - National Semiconductor (TI) |
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LP5550 数据表(HTML) 7 Page - National Semiconductor (TI) |
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7 / 25 page  LDO3 (Memory Retention Voltage) Characteristics Unless otherwise noted, V BAT1,2,SW , RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, -40 to +125˚C. (Notes 2, 7, 8) (Continued) Symbol Parameter Conditions Min Typ Max Units I OUT Recommended Output Current, Active state 3.0V ≤ V BAT1,2,SW ≤ 5.5V 50 mA Recommended Output Current, Sleep state 3.0V ≤ V BAT1,2,SW ≤ 5.5V 5 Short Circuit Current Limit, Active state V OUT =0V 230 eN Output Voltage Noise 10Hz ≤ f ≤ 100kHz,C OUT = 1µF 0.158 mVRMS PSRR Power Supply Ripple Rejection Ratio f = 217Hz, C OUT = 1.0µF 36 dB COUT Output Capacitance 0µA ≤ I OUT ≤ 5mA 0.7 1 2.2 µF Output Capacitor ESR 5 500 m Ω Switcher (Core Voltage) Characteristics Unless otherwise noted, V BAT1,2,SW , RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, -40 to +125˚C. (Notes 2, 7, 8) Symbol Parameter Conditions Min Typ Max Units V OUT Accuracy Output Voltage I OUT = 1 mA, VOUT = 1.2V, 3.0V < V BAT1,2,SW <5.5V 1.53% 2.70% V I OUT = 1-300 mA, 3.0V < VBAT1,2,SW <5.5V -0.44% 2.70% V OUT Range Programmable Output Voltage Range 0mA ≤ I OUT ≤ 300mA, Programming Resolution = 4.7mV 0.6 1.2 1.2 V ∆V OUT Line regulation 3.0V < V BAT1,2,SW <5.5V, I OUT =10mA 0.18 %/V Load regulation V BAT1,2,SW = 3.6V I OUT = 100-300mA 0.0019 %/mA I Q Quiescent current consumption I OUT = 0mA 15 30 µA R DSON(P) P-FET resistance V BAT1,2,SW = VGS = 3.6V 360 690 m Ω R DSON(N) N-FET resistance V BAT1,2,SW = VGS = 3.6V 250 660 m Ω I LIM Switch peak current limit 3.0V < V BAT1,2,SW <5.5V 400 620 750 mA f OSC Internal oscillator frequency PWM-mode 800 1000 1360 kHz C OUT Output Capacitance 0mA ≤ I OUT ≤ 300mA 5 10 22 µF Output Capacitor ESR 5 500 m Ω L Inductor inductance 0uA ≤ I OUT ≤ 300mA 4.7 / 10 µH R VFB V FB pin resistance to ground 150 650 k Ω Logic and Control Inputs Unless otherwise noted, V BAT1,2,SW , RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction tem- perature range for operation, -40 to +125˚C. (Notes 2, 7, 8, 9) Symbol Parameter Conditions Min Typ Max Units V IL Input Low Level ENABLE, RESETN, SPWI, SCLK 3.0V ≤ V BAT1 ≤ 5.5V 0.2 V V IH Input High Level ENABLE, RESETN 3.0V ≤ V BAT1 ≤ 5.5V 2 V V IH_PWI Input High Level, PWI SPWI, SCLK, 1.5V ≤V O2 ≤ 3.3V V O2-0.2V V I IL Logic Input Current ENABLE, RESETN, 0V ≤ V BAT1 ≤ 5.5V -5 5 µA I IL_PWI Logic Input Current, PWI SPWI, SCLK, 1.5V ≤ V O2 ≤ 3.3V -5 15 µA www.national.com 7 |
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