CS7666

DS302PP1

29

Flare Control 6 (2Ch)

Cr_L

[1:0]

Flare control filter Cr low threshold bits 1 and 0.

Cb_L

[1:0]

Flare control filter Cb low threshold bits 1 and 0.

Cr_H

[1:0]

Flare control filter Cr high threshold bits 1 and 0.

Cb_H

[1:0]

Flare control filter Cb high threshold bits 1 and 0.

Scaler Control 1 (2Dh)

PLL_M

[4:0]

This is the PLL M value when the CUSTOM bit (bit 3 register 04h) is set.

BYPASS

[1:0]

See PLL section.

Scaler Control 2 (2Eh)

PLL_N

[4:0]

This is the PLL N value when the CUSTOM bit (bit 3 register 04h) is set.

HALF

Sets the internal PLL reference clock to 1/2 the input clock.

Scaler Control 3 (2Fh)

OFFSET

[7:0]

This value controls the offset fo the internal Scaler.

Configuration Control 0 (30h)

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h) and the

Configuration Index Register (43h) is set to 00h.

76543210

Cb_H1

Cb_H0

Cr_H1

Cr_H0

Cb_L1

Cb_L0

Cr_L1

Cr_L0

R/W

R/W

R/W

R/W

76543210

BYPASS1

BYPASS0

res

PLL_M4

PLL_M3

PLL_M2

PLL_M1

PLL_M0

R/W

Reserved

R/W

76543210

HALF

res

res

PLL_N4

PLL_N3

PLL_N2

PLL_N1

PLL_N0

R/W

Reserved

R/W

76543210

OFFSET7

OFFSET6

OFFSET5

OFFSET4

OFFSET3

OFFSET2

OFFSET1

OFFSET0

R/W

76

54

32

10

res

res

res

res

res

SKP010

SKP09

SKP08

Reserved

R/W