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ST92195D 数据表(PDF) 115 Page - STMicroelectronics |
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ST92195D 数据表(HTML) 115 Page - STMicroelectronics |
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115 / 249 page  115/249 ST92195C/D - ON SCREEN DISPLAY (OSD) ON SCREEN DISPLAY (Cont’d) 7.4.6 Display Memory Mapping Examples The display content is stored in TDSRAM, (2 to 8K bytes starting at address 8000h). Use register TDPR R252 (FCh) Page 32 to address the memo- ry blocks containing the display data. Two 4-bit ad- dress pointers (bits PG and HS) must be given that point to separate blocks containing the display page and the header/status rows. Alternatively, the PG and HS pointers can be writ- ten to the TDPPR R246 Page 33 and TDHSPR R247 Page 33 registers. 7.4.6.1 Building a Serial Mode Full Page 40- Char Display Page Location: The 1 Kbyte block of page content is stored in the TDSRAM location pointed to by the PG3..PG0 bits. Header & Status Rows Location: The 0.5 Kbyte block containing the Header, Status Row 0 and Status Row 1 is pointed to by the HS3..HS0 bits. Row Scrolling Buffer Location: The scrolling buffer corresponds to the 40 bytes following the Row 23 when the scrolling feature is used. Figure 69. Serial Mode (40 Characters) - Page Mapping Figure 70. Serial Mode (40 Characters) - Header and Status Mapping 1K TDSRAM Row 1 Row 23 Scrolling Buffer Free Space Resolution 1K bytes Block Number(1K) TDSRAM Address (hex) TDPR Value (hex) PG3..PG0 0 8000 0 1 8400 2 2 8800 4 3 8C00 6 4 9000 8 5 9400 A 6 9800 C 7 9C00 E 6K 2K 8K 0.5K TDSRAM Header Status Row 0 Free Space Resolution 0.5K bytes Block Number (0.5K) TDSRAM Address (hex.) TDPR Value (Hex.) HS3..HS0 0 8000 0 1 8200 1 2 8400 2 3 8600 3 4 8800 4 5 8A00 5 6 8C00 6 7 8E00 7 8 9000 8 9 9200 9 10 9400 A 11 9600 B 12 9800 C 13 9A00 D 14 9C00 E 15 9E00 F Status Row 1 6K 2K 8K |
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