ST92195D datasheet(133/249 Pages) STMICROELECTRONICS

133 / 249 page

133/249

ST92195C/D - ON SCREEN DISPLAY (OSD)

ON SCREEN DISPLAY (Cont’d)

DISPLAY

CONTROL

MODE

(DCM0R)

R250 - Read/Write

Reset Value: 0000 0000 (00h)

Bit 7 = DE:

Display Enable control bit.

If DE is reset, no display will be performed. If DE is

set, a display will be done as defined through the

various control bits.

Bit 6 = STE:

Semi-Transparent Enable bit.

This bit is active only in Single page display mode.

While the Display is disabled, the horizontal and

vertical sequencers are forced in their reset state

and the RGB & FB DACs are not off (still present-

ing on-chip resistors to Ground).

Note: This mode shows a visible grid on the

screen.

Bit 5 = FRE:

Fringe Enable control bit.

If this bit is set, and the SWE bit is reset (refer to

the National Character Set Register description)

the serial attribute 1Bh has a fringe toggle func-

tion.

Bit 4 = CE:

Conceal Enable control bit.

0: Reveal any text defined as concealed by serial

attributes (Default)

1: Conceal any text defined as concealed by serial

attributes

Bit 3 = GFR:

Global Fringe Enable control bit.

If this bit is set, the whole display is in fringe mode

(except if a Double page display mode is pro-

grammed).

Bit 2 = GRE:

Global Rounding Enable control bit.

If this bit is set, the whole display is in rounding

mode (except if a Double page display mode is

programmed).

Bit 1 = SF:

Screen Format control bit.

0: Configures the Display for 4/3 TV screen format.

1: A fixed offset of 128 Pixel clock periods is added

before any character is displayed; the Full

Screen Color attribute is used while the offset is

running.

The SF bit intended for displaying on 16/9 TV

screen format tubes, the display picture will be re-

centered.

Bit 0 = S/D:

Single or Double page control bit.

0: A single page is displayed on screen (i.e. 40-

character width).

1: A set of two pages is displayed contiguously

(i.e. 80-character width).

Note: In 80 characters per row and in full page

mode, line 25 of each field is displayed as a

transparant line (as this line is not in the visible

part of the screen, this should not present a limita-

tion).

Programming a Double page display will automat-

ically mask the Fringe, Rounding and Parallel

Mode control bits. Their register values are not

changed and they will automatically recover their

initial effect if the display is switched back in a Sin-

gle page mode.

STE

FRE

GFR

GRE

S/D

FRE

SWE

1Bh Serial attribute acts as:

No Action

G0 Toggle

Fringe Toggle

G0 Toggle

ST92195D 数据表(PDF) 133 Page - STMicroelectronics

ST92195D 数据表(HTML) 133 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载