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ST92195D 数据表(PDF) 135 Page - STMicroelectronics |
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ST92195D 数据表(HTML) 135 Page - STMicroelectronics |
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135 / 249 page ![]() 135/249 ST92195C/D - ON SCREEN DISPLAY (OSD) ON SCREEN DISPLAY (Cont’d) DISPLAY ENABLE 0 CONTROL REGISTER (DE0R) R253 -Read/Write Register Page: 32 Reset Value: 1111 1111 (FFh) Bits 7:0 = R[8:1]: Row display enable control bit. When the “Ri” bit is set (Reset value), the corre- sponding row (with row in the page, numbered from 1 to 23) will be displayed. When the “Ri” bit is reset, the full screen color is displayed. DISPLAY ENABLE 1 CONTROL REGISTER (DE1R) R254 -Read/Write Register Page: 32 Reset Value: 1111 1111 (FFh) Bits 7:0 = R[16:9]: Row display enable control bit. When the “Ri” bit is set (Reset value), the corre- sponding row (with row in the page, numbered from 1 to 23) will be displayed. When the “Ri” bit is reset, the full screen color is displayed. DISPLAY ENABLE 2 CONTROL REGISTER (DE2R) R255 -Read/Write Register Page: 32 Reset Value: x111 1111 (xFh) Bit 7 = Reserved . Bits 6:0 = R[23:17]: Row display enable control bit. When the “Ri” bit is set (Reset value), the cor- responding row (with row in the page, numbered from 1 to 23) will be displayed. When the “Ri” bit is reset, the full screen color is displayed. 70 R8 R7 R6 R5 R4 R3 R2 R1 70 R16 R15 R14 R13 R12 R11 R10 R9 70 x R23 R22 R21 R20 R19 R18 R17 |
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