ST92195D datasheet(139/249 Pages) STMICROELECTRONICS

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ST92195C/D - ON SCREEN DISPLAY (OSD)

; F8, Scrolling Control Line register

ld SCLR ,#000h ; SCE, FSC, SS, FIRSTROWSCRO[4:0]

; F9, Scrolling Control Horizontal register

ld SCHR ,#02fh ; DH, ER, UP/D, LASTROWSCRO[4:0]

;------- Cursor position

; F8, Scrolling Control Line register

ld SCLR ,#000h ; SCE, FSC, SS, FIRSTROWSCRO[4:0]

; F9, Scrolling Control Horizontal register

ld SCHR ,#02fh ; DH, ER, UP/D, LASTROWSCRO[4:0]

; F6, Cursor Horizontal Position register

ld CHPOSR , #005h; CURSOR HPOS [6:0]

; F7, Cursor Vertical Position register

ld CVPOSR , #000h; FON, CM[1:0], CURSOR VPOS[4:0]

;------- Control

; FA, Control Mode 0 register

ld DCM0R,#0a0h; DE, STE, FRE, CE, GFR, GRE, SF=4/3, S/D=40

; display enable

; solid mode

; toggle fringe enable

ld DCM1R,#0x04; register 251 (FBh) Control Mode 1 register

; DAT[6:4]/bits 7,6,5 & TDR/bit4

; FNEX=0, on-chip font

; FBL=1 fastblanking active high

; PM =0 Full page mode

; SPM =0 serial mode

;--------Dram location: header/status rows, current display

; FC, Dram Location register

ld TDPR, #080h; HS[3:0], AD[3:0]

; for header bit12=1

;------- foreground/background

spp #DMP2_PG; page 021h Display memory map registers page

ld DC, #07Fh ; reg. F0h, DFG [3:0], DBG [3:0]

; FG full white

; BG grey (half white)

;-----------------------------

spp #DMP1_PG; page 020h Display memory map registers page

ld DE0R, #0FFh; ROWEN [8:1]

ld DE1R, #0FFh; ROWEN [16:9]

ld DE2R, #0FFh; ROWEN [23:17]

ret

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