ST92195D datasheet(142/249 Pages) STMICROELECTRONICS

142 / 249 page

142/249

ST92195C/D - SYNC CONTROLLER

SYNC CONTROLLER (Cont’d)

7.5.4.2 Composite Sync Input Mode

This mode is very similar to the “Standard Sync In-

put Mode” described above. It is also accessed

when both MOD1 and MOD0 bits are reset.

In Composite Sync mode, a single CSYNC/

HSYNC input pin is used to enter both the horizon-

tal and vertical sync pulses (VSEP control bit is set

to 1). In this mode, the VSYNC pin must be tied to

VSS on the application board to prevent a floating

CMOS input configuration.

The CSYNC signal characteristics are assumed to

perfectly respect the STV2160 TXTOUT pin spec-

ification which is reviewed in Figure 2 & Figure 3.

The vertical sync signal is extracted from the

CSYNC signal by the mean of an Up/Down coun-

ter used as a digital integrator. The counter works

in “Up” mode during the sync pulses.

Two time constants can be programmed using the

VDLY control bit (refer to the register description).

The smallest one corresponds to 16µs; the second

one being 32µs.

Figure 84. STV2160 TXTOUT Timings

1st TV Field

2nd TV Field

TXTOUT

623

624

625

311

312

313

314

315

316

317

318

319

8µs

58µs

38µs 8µs

8µs

58µs

6µs

8µs

VR02092B

ST92195D 数据表(PDF) 142 Page - STMicroelectronics

ST92195D 数据表(HTML) 142 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载