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STM32MP151AAB3 数据表(PDF) 157 Page - STMicroelectronics |
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STM32MP151AAB3 数据表(HTML) 157 Page - STMicroelectronics |
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157 / 253 page  DS12500 Rev 3 157/253 STM32MP151A/D Electrical characteristics 232 DDR characteristics DDR3, DDR3L I/O DC specifications The following table provides input and output DC threshold values and on-die-termination (ODT) recommended values. The conditions for the output threshold values are un- terminated outputs loaded with 1 pF capacitor load. The ODT values are measured after impedance calibration. LPDDR2, LPDDR3 I/O DC specifications The following table provides input and output DC threshold values. The conditions for the output threshold values are un-terminated outputs loaded with 1 pF capacitor load. 6.3.14 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Table 43. DC specifications – DDR3 or DDR3L mode(1) Symbol Parameter Min Typ Max Unit VIH(DC) DC input voltage high VREF + 0.09 - VDDQ V VIL(DC) DC input voltage low VSSQ - 0.3 - VREF - 0.09 V VOH DC output logic high 0.8 × VDDQ -- V VOL DC output logic low - - 0.2 × VDDQ V RTT Input termination resistance (ODT) to VDDQ/2 100 54 36 120 60 40 140 66 44 Ω ILS Input leakage current, SSTL mode, unterminated - 0.01 4.8 μA 1. Guaranteed by design. Table 44. DC specifications – LPDDR2 or LPDDR3 mode(1) Symbol Parameter Min Typ Max Unit VIH(DC) DC input voltage high VREF + 0.13 - VDDQ V VIL(DC) DC input voltage low VSSQ -VREF - 0.13 V VOH DC output logic high 0.9 × VDDQ -- V VOL DC output logic low - - 0.1 × VDDQ V ILEAK Input leakage current - 0.01 4.51 μA 1. Guaranteed by design. |
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