ST8500 datasheet(18/37 Pages) STMICROELECTRONICS

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Device architecture

ST8500

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DocID031029 Rev 3

2.6.2

System power modes and low-power mode

In order to fine-tune the power consumption, the ST8500 device supports different power

modes. Based on the selected clock source (see Section 2.5) the Cortex™-M4 can select

the system power mode between:



NORMAL mode: the system is clocked by the VCO output frequency of the FS (with

prescaling factor)



SLOW mode: the system is clocked directly by the XOSC frequency



DOZE mode: the system is clocked by the ROSC oscillator



LOW-POWER mode: the system is clocked by the ROSC oscillator and additional

power saving strategies can be applied.

In NORMAL mode, the Cortex™-M4 is able to run at its maximum frequency but, in case

lower speed is sufficient to meet the application requirements, its clock frequency can be

scaled down to reduce power consumption, while AFE, DFE and RTE frequencies are

always internally selected to meet the running PLC protocol requirements. In case PLC

connectivity is temporarily not required, the Cortex™-M4 can be put in SLOW (depending

on the computational power and power consumption required) turning off the frequency

synthesizer (and all the derived clock signals). When in DOZE mode also th XOSC block

can be turned off.

An additional LOW-POWER mode is present. In this mode it is possible to define which

power reduction strategies are put in place by the means of a software selectable mask

which can:



Disable the AFE analog blocks



Disable the external clock sources (XOSC and FS)



Apply clock gating to all the digital blocks including the CPU



Power down the SRAM memories

The LOW-POWER can be selected by the Cortex™-M4F or by an external controller with a

dedicated pin (LPMODEn, active low). The exit from LOW-POWER mode is controlled by

the Cortex™-M4, by LPMODEn pin, by internal GPT0 timer tick. During LOW-POWER

mode the content of SRAM memories is still valid and accessible by cores if not put in

power-down.

Figure 5 shows the possible transitions between power system modes.

ST8500 数据表(PDF) 18 Page - STMicroelectronics

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