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ST8500TR 数据表(PDF) 5 Page - STMicroelectronics

部件名 ST8500TR
功能描述  Programmable power line communication modem System on Chip
PDF  37 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST8500TR 数据表(HTML) 5 Page - STMicroelectronics

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ST8500
Device architecture
37
2
Device architecture
The ST8500 architecture is composed of the following parts:
1.
PLC front-end including digital front-end (DFE) and analog front-end (AFE)
2.
Real-time engine: the digital core running the lower layers of the PLC protocol stack
and implementing modulation, demodulation and advanced forward error corrections
(FEC) algorithms
3.
Protocol engine: the digital core running the upper layers of the PLC protocol stack and
managing the interface with external microcontrollers.
4.
Peripherals, crypto, debug section
5.
Clock and reset section
6.
Power management section
The ST8500 detailed architecture is shown in Figure 2.



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