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PI3DPX1202A

Document number: DS40115 Rev.2-1

4.3

SMBus Registers

The AUX register can be read/write using the SMBus input. When in AUX mode, the control of the registers is passed to AUX, writ-

ing the SMBUS as the same time should be avoided.

In TMDS mode setting (CAD_DET) = 1, external source can use SMBus to set the Equalization settings. EQ table can also be set by

programming SMBus register 1.

SMBus is set to auto EQ mode 1 by default. ie. Reg0x01=00001101.

Table 4-10: SMBUS Register 0x00 & 0x01 Definition

SMBus Reg-

isters

Description

Default value

SMBus

Access

0x00

EQ Control Select, when CNTRL= 0 with SMBus_reg 0x01 bit [1:0]

bit[7]: EQ2

bit[6]: EQ1

bit[5]: EQ0

bit[4]: EQBAND is EQ group control register. Please refer Gain(dB) Control table

Pre-emphasis control

bit[3]: Control OP1 pin

bit[2]: Control OP0 pin

Swing control

bit[1]: Control OC1 pin

bit[0]: Control OC0 pin

06h

R/W

0x01

bit [7:4] Reserved

bit [3:2] EQ control

00: EQ pin set Low

01: EQ pin set Middle

11: EQ pin set High

bit [1:0] AUTO_EQ control

00: AUTO_EQ pin set Low

01: AUTO_EQ pin set Middle

11: AUTO_EQ pin set High

00h

R/W

0x02: 0x14

Reserved

00h

R/W