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September 2017

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PI3DPX1202A

Document number: DS40115 Rev.2-1

General Power and Ground Guideline

To provide a clean power supply for Diodes high-speed device, few recommendations are listed below:

•

Power (VDD) and ground (GND) pins should be connected to corresponding power planes of the printed circuit board directly

without passing through any resistor.

•

The thickness of the PCB dielectric layer should be minimized such that the VDD and GND planes create low inductance paths.

•

One low-ESR 0.1uF decoupling capacitor should be mounted at each VDD pin or should supply bypassing for at most two VDD

pins. Capacitors of smaller body size, i.e. 0402 package, is more preferable as the insertion loss is lower. The capacitor should be

placed next to the VDD pin.

•

One capacitor with capacitance in the range of 4.7uF to 10uF should be incorporated in the power supply decoupling design as

well. It can be either tantalum or an ultra-low ESR ceramic.

•

A ferrite bead for isolating the power supply for Diodes high-speed device from the power supplies for other parts on the printed

circuit board should be implemented.

•

Several thermal ground vias must be required on the thermal pad. 25-mil or less pad size and 14-mil or less finished hole are

recommended.

G N D P la ne

VIN

V DD P la ne

10uF

1uF

0.1uF

0.1uF

0.1uF

Bypass noise

Power Flow

VIN

VIN

Center Pad

GND Plane

Several Thermal GND Vias must

be required on the Thermal Pad area

Figure 6-3: Decoupling Capacitor Placement Diagram