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LIS25BA

I²C- inter-IC control interface

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5

I²C- inter-IC control interface

5.1

I²C interface

The registers embedded inside the LIS25BA may be accessed also through the I²C serial

interfaces.

The LIS25BA I²C is a bus slave. The I²C is employed to write data into registers whose

content can also be read back.

The relevant I²C terminology is given in the table below.

There are two signals associated with the I²C bus: the serial clock line (SCL) and the serial

data line (SDA). The latter is a bidirectional line used for sending and receiving the data

to/from the interface. Both lines must be connected to Vdd through an external pull-up

resistor. When the bus is free, both lines are high.

The I²C interface is compliant with fast mode (400 kHz) I²C standards as well as with the

normal mode.

5.2

I²C interface details

The transaction on the bus is started through a START signal. A START condition is defined

as a HIGH to LOW transition on the data line while the SCL line is held HIGH (refer to ST

condition in the following paragraph). After this signal has been transmitted by the master,

the bus is considered busy. The next byte of data transmitted after the start condition

contains the address of the slave in the first 7 bits and the eighth bit tells whether the master

is receiving data from the slave or transmitting data to the slave (SAD subsequences).

When an address is sent, each device in the system compares the first seven bits after a

start condition with its address. If they match, the device considers itself addressed by the

master. The address can be made up of a programmable part and a fixed part, thus allowing

more than one device of the same type to be connected to the I²C bus.

Data transfer with acknowledge is mandatory. The transmitter must release the SDA line

during the acknowledge pulse. The receiver must then pull the data line LOW so that it

remains stable low during the HIGH period of the acknowledge clock pulse (SAK

subsequence). A receiver which has been addressed is obliged to generate an

Table 10. I²C serial interface pin description

Pin name

Pin description

I2C_SCL

I²C serial clock (SCL)

I2C_SDA

I²C serial data (SDA)

Table 11. I²C terminology

Term

Description

Transmitter The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates a transfer

Slave

The device addressed by the master