IS25LP032D-RLLA3 datasheet(28/118 Pages) ISSI

28 / 118 page

IS25LP032D

IS25WP032D

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A12

08/04/2020

WIP bit: The definition of the WIP bit is exactly same as the one of Status Register.

PROT_E bit: The Protection Error bit indicates whether an Erase or Program operation has attempted to modify a

protected array sector or

block, or to access a locked Information Row region. When the bit is set to “1” it indicates

that there was an error or errors in previous Erase or Program operations. See Table 6.15 for details.

P_ERR bit: The Program Error bit indicates whether a Program operation has succeeded or failed, or whether a

Program operation has attempted to program a protected array sector/block or a locked Information Row region.

When the bit is set to “1” it indicates that there was an error or errors in previous Program or Write/Set Non-Volatile

E_ERR bit: The Erase Error bit indicates whether an Erase operation has succeeded or failed, or whether an Erase

operation has attempted to erase a protected array sector/block or a locked Information Row region. When the bit

is set to “1” it indicates that there was an error or errors in previous Erase or Write/Set Non-Volatile Register

operations. See Table 6.15 for details.

Table 6.15 Instructions to set PROT_E, P_ERR, or E_ERR bit

Instructions

Description

PP/PPQ

The commands will set the P_ERR if there is a failure in the operation. Attempting to program

within the protected array sector/block or within an erase suspended sector/block will result in

a programming error with P_ERR and PROT_E

set to “1”.

IRP

The command will set the P_ERR if there is a failure in the operation. In attempting to program

within a locked Information Row region, the operation will fail with P_ERR and PROT_E set to

WRSR/WRABR/SRPNV/

SERPNV

The update process for the non-volatile register bits involves an erase and a program operation

on the non-volatile register bits. If either the erase or program portion of the update fails, the

related error bit (P_ERR or E_ERR)

will be set to “1”.

Only for WRSR command, when Status Register is write-protected by SRWD bit and WP# pin,

attempting to write the register will set PROT_E and E_ERR to “1”.

WRFR

The commands will set the P_ERR if there is a failure in the operation.

SER/BER32K/BER64K/CER/

IRER

The commands will set the E_ERR if there is a failure in the operation. E_ERR and PROT_E

will be set to “1” when the user attempts to erase a protected main memory sector/block or a

locked Information Row region. Chip Erase (CER) command will set E_ERR and PROT_E if

any Block Protection bits (BP3~BP0) are not 0. .

Notes:

OTP bits in the Function Register may only be programmed to “1”. Writing of the bits back to “0” is ignored and no

error is set.

2. Read only bits in registers are never modified by a command so that the corresponding bits in the Write/Set Register

command data byte are ignored without setting any error indication.

Once the PROT_E, P_ERR, and E_ERR error bits are set to “1”, they remains set to “1” until they are cleared to “0”

with a Clear Extended Read Register (CLERP) command. This means that those error bits must be cleared through

the CLERP command. Alternatively, Hardware Reset, or Software Reset may be used to clear the bits.

4. Any further command will be executed even though

the error bits are set to “1”.

IS25LP032D-RLLA3 数据表(PDF) 28 Page - Integrated Silicon Solution, Inc

IS25LP032D-RLLA3 数据表(HTML) 28 Page - Integrated Silicon Solution, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载