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Item

Description

Reset/read

Initiate read or reset operations by writing the read/reset command sequence into the command

register. This allows the microprocessor to retrieve data from the memory. Device remains in read mode

until command register contents are altered.

Device automatically powers up in read/reset state. This feature allows only reads, therefore ensuring no

spurious memory content alterations during power up.

ID read

AS29F040 provides manufacturer and device codes in two ways. External PROM programmers typically

access the device codes by driving +12V on A9. AS29F040 also contains an ID read command to read

the device code with only +5V, since multiplexing +12V on address lines is generally undesirable.

Initiate device ID read by writing the ID read command sequence into the command register. Follow

with a read sequence from address XXX00h to return MFG code. Follow ID read command sequence

with a read sequence from address XXX01h to return device code.

To verify write protect status on sectors, read address XXX02h. Sector addresses A18–A16 produc e a1

on DQ0 for protected sector and a 0 for unprotected sector.

Exit from ID read mode with Read/Reset command sequence.

Byte/word

programming

Programming the AS29F040 is a four bus cycle operation performed on a byte-by-byte basis. Two

unlock write cycles precede the program setup command and program data write cycle. Upon

execution of the program command, no additional CPU controls or timings are necessary. Addresses are

latched on the falling edge of CE or WE, whichever is last; data is latched on the rising edge of CE or

WE, whichever is first. The AS29F040’s automated on-chip program algorithm provides adequate

internally-generated programming pulses and verifies the programmed cell margin.

Check programming status by sampling data on the DATA polling (DQ7), or toggle bit (DQ6). The

AS29F040 returns the equivalent data that was written to it (as opposed to complemented data), to

complete the programming operation.

The AS29F040 ignores commands written during the programming operation.

AS29F040 allows programming in any sequence, across any sector boundary. Changing data from 0 to 1

requires an erase operation. Attempting to program data 0 to 1 results in DQ5 = 1 (exceeded

programming time limits); reading this data after a read/reset operation returns a 0. When

programming time limit is exceeded, DQ5 reads high, and DQ6 continues to toggle. In this state , areset

command returns the device to read mode.

Chip erase

Chip erase requires six bus cycles: two unlock write cycles; a setup command, two additional unlock

write cycles; and finally the Chip erase command.

Chip erase does not require logical 0s to be written prior to erasure. When the automated on-chip erase

algorithm is invoked with the Chip erase command sequence, AS29F040 automatically programs and

verifies the entire memory array for an all-zero pattern prior to erase. The AS29F040 returns to read

mode upon completion of chip erase unless DQ5 is set high as a result of exceeding time limit.