August 2004

ASM5CVF857

rev 1.2

2.5V Wide-Range Frequency Clock Driver (60 MHz

– 200 MHz)

2 of 15

Notice: The information in this document is subject to change without notice.

F B_O UTT

F B_O UTC

CLKT0

CLKC0

CLKT1

CLKC1

CLKT2

CLKC2

CLKT3

CLKC3

CLKT4

CLKC4

CLKT5

CLKC5

CLKT6

CLKC6

CLKT7

CLKC7

CLKT8

CLKC8

CLKT9

C L KC 9

Control

PLL

AVDD

PDB

FB_INT

FB_INC

CLK_INC

CLK_INT

Logic

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

GND

CLKC0

CLKT0

VDD

CLKT1

CLKC1

GND

GND

CLKC2

CLKT2

VDD

VDD

CLK_IN T

CLK_INC

VDD

AVDD

AGND

GND

CLKC3

CLKT3

VDD

CLKT4

CLKC4

GND

GND

CLKC5

CLKT5

VDD

CLKT6

CLKC6

GND

GND

CLKC7

CLKT7

VDD

PDB

FB_INT

FB_INC

VDD

FB_OUT C

FB_OUT T

GND

CLKC8

CLKT8

VDD

CLKT9

CLKC9

GND

Block Diagram

Pin Configuration