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ASM5CVF857 数据表(PDF) 7 Page - Alliance Semiconductor Corporation |
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ASM5CVF857 数据表(HTML) 7 Page - Alliance Semiconductor Corporation |
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7 / 15 page ![]() August 2004 ASM5CVF857 rev 1.2 2.5V Wide-Range Frequency Clock Driver (60 MHz – 200 MHz) 7 of 15 Notice: The information in this document is subject to change without notice. Recommended Operating Conditions TA = 0°C to 85°C. Supply voltage AVDD and VDD=2.5V ± 0.2V (unless otherwise stated). Parameter** Symbol Conditions Min Typ Max Unit Supply Voltage VDD, AVDD 2.3 2.5 2.7 V Low level input voltage VIL CLK_INT, CLK_INC, FB_INT, FB_INC 0.4 VDD/2 - 0.18 V VIH CLK_INT, CLK_INC, FB_INT, FB_INC VDD/2 + 0.18 2.1 V High level input voltage PDB 1.7 VDD + 0.3 V DC input signal voltage # VIN -0.3 VDD + 0.3 V VID DC: CLK_INT, CLK_INC, FB_INT, FB_INC 0.36 VDD + 0.6 V Differential input signal voltage $ AC: CLK_INT, CLK_INC, FB_INT, FB_INC 0.7 VDD + 0.6 V Output differential cross voltage @ VOX VDD/2 - 0.15 VDD/2 + 0.15 V Input differential cross voltage VIX VDD/2 - 0.2 VDD/2 + 0.2 V High-level output current IOH -12 mA Low-level output current IOL 12 mA Operating free-air temperature TA 0 85 °C **: Unused inputs must be held high or low to prevent them from floating. #: DC input signal voltage specifies the allowable DC execution of differential $: Differential inputs signal voltages specify the differential voltage [VTR-VCP] required for switching where VTR is the true input level and VCT is the complementary input level. @: Differential cross-point voltage is expected to track variations of VDD and is the voltage at which the differential signal must be crossing. |
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