5 Pin Configuration and Functions

PGND

VIN

4

5

6

7

8

9

1

2

3

EN/SYNC

VO

SW

10

PG

Figure 5-1. 10-Pin QFN RPU Package (Top View)

Pin Functions

PIN

I/O

DESCRIPTION

NO.

NAME

1

EN/SYNC

I

Enable/Disable Pin including threshold-comparator. Connect to logic low to disable the device. Pull high to enable the device.

This pin has an internal pulldown resistor of typically 500 kΩ when the device is disabled. Apply a clock to this pin to

synchronize the device.

2

SW

I/O

Switch pin of the power stage

3

VO

I

Output voltage sense pin. This pin needs to be connected directly after the first inductor.

4

PGND

Power ground connection

5

PG

O

Open-drain power-good output. This pin is pulled to GND when Vout is below the power-good threshold. It requires a pullup

resistor to output a logic high. It can be left open or tied to GND if not used.

6

VIN

I

Power supply input voltage pin

7

PSNS

I

Power Sense Ground. Connect directly to the ground plane.

8

NR/SS

O

A capacitor connected to this pin sets the soft-start time and low frequency noise level of the device.

9

FB

I

Feedback pin of the device

10

S-CONF

O

Smart Configuration Pin. This pin configures the operation modes of the device. See Table 7-1.

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TPS62912, TPS62913

SLVSFP4 – AUGUST 2020

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