 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
BLE18PS080SN1 数据表(PDF) 6 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
BLE18PS080SN1 数据表(HTML) 6 Page - Texas Instruments |
|
|
6 / 36 page  6.5 Electrical Characteristics (continued) Over recommended input voltage range, TJ = -40℃ to 150℃. Typical values are at Vin = 12V and TJ = 25℃ (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT toff Minimum off-time VIN ≥ 5V, Iout = 1A 50 60 ns VFB Feedback regulation accuracy -40 ℃ ≤ TJ ≤ 150℃ 0.792 0.8 0.812 V VFB Feedback regulation accuracy -40 ℃ ≤ TJ ≤ 125℃ 0.792 0.8 0.808 V VFB Feedback regulation accuracy TJ = 25℃ 0.796 0.8 0.804 V IFB,LKG Input leakage current into FB VFB = 0.8V, -40℃ ≤ TJ ≤ 125℃ 0.01 70 nA IVO,LKG Input leakage current into VO VVO = 1.2V, -40℃ ≤ TJ ≤ 125℃ 0.01 30 µA PSRR Power supply rejection ratio VIN = 12V, 1.2VOUT, CNR/SS = 470nF, fsw = 1MHz, CFF = open, L1 = 2.2µH, COUT = 3x22µF, 100kHz ≤ f ≤ 3MHz 50 dB PSRR Power supply rejection ratio VIN = 5V, 1.2VOUT, CNR/SS = 470nF, fsw = 2.2MHz, CFF = open, L1 = 2.2µH, COUT = 3x22µF, 100kHz ≤ f ≤ 3MHz 40 dB VNRMS Output voltage RMS noise VIN = 12V, BW = 100Hz to 100kHz, CNR/ SS = 470nF, fSW = 1MHz, VOUT = 1.2V, CFF = open, L1 = 2.2µH, COUT = 3 x 22 µF 24.4 µVRMS VNRMS Output voltage RMS noise VIN = 5V, BW = 100Hz to 100kHz, CNR/ SS = 470nF, fSW = 2.2MHz, VOUT = 1.2V, CFF = open, L1 = 2.2µH, COUT = 3 x 22µF 13.5 µVRMS VOPP Output ripple voltage at fSW VIN = 12V, fSW = 1MHz, VOUT = 1.2V, L1 = 4.7µH, COUT = 3x22µF, Lf = 10nH, Cf = 2x22µF 9 µVRMS VOPP Output ripple voltage at fSW VIN = 5V, fSW = 2.2MHz, VOUT = 1.2V, L1 = 2.2µH, COUT = 3x22µF, Lf = 10nH, Cf = 2x22uF < 2.2 µVRMS RDIS Output discharge resistance EN/SYNC = GND, VOUT = 1.2V, VIN ≥ 5V. See Typical Char for plot. 7 Ω RDIS Output discharge resistance EN/SYNC = GND, VOUT = 5V, VIN ≥ 5V. See Typical Char for plot. 32 Ω fSW Switching frequency 2.2-MHz setting 1.98 2.2 2.42 MHz fSYNC Synchronization range 2.2-MHz setting 1.9 2.2 2.42 MHz fSW Switching frequency 1-MHz setting 0.9 1 1.18 MHz fSYNC Synchronization range 1-MHz setting 0.86 1 1.2 MHz DSYNC Synchronization duty cycle 45 55 % tsync_delay Synchronization phase delay Phase delay from EN/SYNC rising edge to SW rising edge 90 ns ISWpeak Peak switch current limit, see Current Limit TPS62912 2.9 3.5 4.0 A ISWpeak Peak switch current limit, see Current Limit TPS62913 3.7 4.3 5.1 A ISWvalley Valley switch current limit, see Current Limit TPS62912 3.4 A ISWvalley Valley switch current limit, see Current Limit TPS62913 4.2 A Ineg_valley Negative valley current limit, see Current Limit -1.53 -0.96 A RDS(ON) High-side FET on-resistance VIN ≥ 5V 57 95 mΩ Low-side FET on-resistance VIN ≥ 5V 20 39 mΩ TPS62912, TPS62913 SLVSFP4 – AUGUST 2020 www.ti.com 6 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: TPS62912 TPS62913 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
