switching frequency. In this case, the output voltage ripple doubles compared to the use of a 4.7-µH inductor,

which is typically acceptable when powering high speed ADCs. Optimization for powering clock and PLL circuits

that need a 3.3-V output use a 2.2-µH inductor with 2.2-MHz switching frequency, minimizing output voltage

ripple and low frequency noise.

For the application cases that are not found in Table 8-2, there are two methods to design the TPS6291x circuit.

Section 8.2.2.1 uses Webench to design the circuit automatically or the calculations in Section 8.2.2.2 can be

used instead.

Table 8-2. Typical Single L-C Filter Design Recommendations

DESIGN GOAL

INDUCTOR

(2)

OUTPUT

CAPACITORS

(3)

Typical

12 V

(1)

≤ 2.0 V

(1)

1 MHz

2.2 µH

3 x 22 µF, 10 V, 0805

Typical

12 V

4.7 µH

3 x 22 µF, 10 V, 0805

Typical

12 V

> 3.3 V

2.2 MHz

2.2 µH

1 x 47 µF, 1210 and 2

x 22 µF, 10 V, 0805

Higher Efficiency

(with higher ripple and

noise)

12 V

2.2 µH

(4)

3 x 22 µF, 10 V, 0805

Low ripple/noise PLL

and Clock Supply

12 V

2.2 µH

3 x 22 µF, 10V, 0805

Typical

5 V

≤ 3.3 V

2.2 MHz

2.2 µH

3 x 22 µF, 10 V, 0805

Typical

5 V

> 3.3V

2.2 MHz

2.2 µH

1 x 47 µF, 1210 and 2

x 22 µF, 10 V, 0805

(1)

The maximum input to output voltage difference is limited by the device maximum minimum on-time of 70ns. This is especially

important for input voltages above 12 V or output voltages below 1 V. See Section 8.2.2.2.1.

(2)

For inductor part numbers, see Table 8-4.

(3)

For output capacitor part numbers, see Table 8-5.

(4)

The TPS62913 requires a 4.7-µH inductor when using the 1-MHz switching frequency to supply more than 2.5-A load current when the

output voltage is greater than 2.0 V.

noise typically. A second stage filter is added to provide additional attenuation of the output ripple voltage. The

output voltage is sensed after the second L-C filter by connecting the FB resistors to the second stage L-C filter

capacitor. This provides remote sense, minimizing output voltage drop due to the ferrite bead. Refer to Table 8-3

for second stage L-C filter recommendations based on the output voltage.

Table 8-3. Second Stage L-C (Ferrite Bead) Filter Design Recommendations

VOUT (V)

FERRITE BEAD IMPEDANCE (AT 100 MHZ)

(2)

OUTPUT CAPACITORS

(1)

≤ 3.3 V

8 to 20 Ω

2 x 22 µF, 10 V, 0805

> 3.3 V

8 to 20 Ω

3 x 22 µF, 10 V, 0805

(1)

For output capacitor part numbers, see Table 8-5.

(2)

For second stage L-C filter part numbers, see Table 8-6.

8.2.2 Detailed Design Procedure

If the specific design is not found in Table 8-2, WEBENCH is recommended to generate the design. Alternatively,

the manual design procedure in External Component Selection can be followed.

2. Optimize the design for key parameters such as efficiency, footprint, and cost.

3. Open the advanced tab to optimize for output voltage ripple.

4. Once in a TPS6291x design, you can enable the second stage L-C filter and change other settings from the

drop-down on the left.

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TPS62912, TPS62913

SLVSFP4 – AUGUST 2020

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