MAS3549F datasheet(77/92 Pages) MICRONAS

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DATA SHEET

MAS 35x9F

Micronas

June 30, 2004; 6251-505-1DS

4.6.2.5. S/PDIF Output Characteristics

at T = TA, VSUPD, VSUPA = 2.2 ... 3.6 V, fCRYSTAL = 18.432 MHz, Typ. values for TA =25 °C in P(L/M)QFP package.

Fig. 4–27: Timing of the S/PDIF output

4.6.2.6. PIO as Parallel Input Interface: DMA Mode

In decoding mode, the data transfer can be started

after the EOD pin of the MAS 35x9F is set to “high”.

After verifying this, the controller signalizes the send-

ing of data by activating the PR line. The MAS 35x9F

responds by setting the RTR line to the “low” level. The

MAS 35x9F reads the data PI[19:12] and sets RTR to

low after rising edge of PR. After RTR is set to high,

the mC sets PR to low. The next data word write oper-

ation will be initialized again by setting the PR line via

the controller. Please refer to Figure for the exact tim-

ing.

The procedure above will be repeated until the

MAS 35x9F sets the EOD signal to “0” which indicates

that the transfer of one data block has been executed.

Subsequently, the controller should set PR to “0”, wait

until EOD rises again and then repeat the procedure to

send the next block of data. The DMA buffer for MPEG

decoding is 30 bytes long. The size for G.729 is 10

bytes.

Symbol

Parameter

Pin Name

Limit Values

Unit

Test Conditions

Min.

Typ.

Max.

fs1

Bi-phase frequency

SPDO

3.072

MHz

fs = 48 kHz

fs2

Bi-phase frequency

SPDO

2.822

MHz

fs = 44.1 kHz

fs3

Bi-phase frequency

SPDO

2.048

MHz

fs = 32 kHz

Bi-phase period

SPDO

326

at fs = 48 kHz, (highest

sampling rate)

Rise time

SPDO

Cload =10pF

Fall time

SPDO

Cload =10pF

Duty cycle

SPDO

tH1,L1

SPDO

163

minimum/maximum pulse

duration with a level

above 90% or below 10%

and at fs =48 kHz

tH0,L0

SPDO

326

minimum/maximum pulse

duration with a level

above 90% or below 10%

and at fs =48 kHz

Signal amplitude

SPDO

VSUPD

Bit value = 1

Bit value = 0

tH1

tL1

tH0

tL0

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