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STM32H747AI 数据表(PDF) 182 Page - STMicroelectronics |
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STM32H747AI 数据表(HTML) 182 Page - STMicroelectronics |
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182 / 252 page  Electrical characteristics STM32H747xI/G 172/242 DS12930 Rev 1 SDRAM waveforms and timings In all timing tables, the TKERCK is the fmc_ker_ck clock period, with the following FMC_SDCLK maximum values: • For 2.7 V<VDD<3.6 V: FMC_CLK =110 MHz at 20 pF • For 1.8 V<VDD<1.9 V: FMC_CLK =100 MHz at 20 pF • For 1.62 V<DD<1.8 V, FMC_CLK =100 MHz at 15 pF Figure 40. SDRAM read access waveforms (CL = 1) MS32751V2 Row n Col1 FMC_SDCLK FMC_A[12:0] FMC_SDNRAS FMC_SDNCAS FMC_SDNWE FMC_D[31:0] FMC_SDNE[1:0] td(SDCLKL_AddR) td(SDCLKL_AddC) th(SDCLKL_AddR) th(SDCLKL_AddC) td(SDCLKL_SNDE) tsu(SDCLKH_Data) th(SDCLKH_Data) Col2 Coli Coln Data2 Datai Datan Data1 th(SDCLKL_SNDE) td(SDCLKL_NRAS) td(SDCLKL_NCAS) th(SDCLKL_NCAS) th(SDCLKL_NRAS) |
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