STM32H747AI datasheet(30/252 Pages) STMICROELECTRONICS

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Functional overview

STM32H747xI/G

20/242

DS12930 Rev 1

A domain can enter low-power mode (DStop or DStandby) when the processor, its

subsystem and the peripherals allocated in the domain enter low-power mode. For instance

D1 or D2 domain enters DStop/DStandby mode when the CPU of the domain is in CStop

mode AND the other CPU has no peripheral allocated in that domain, or if it is in CStop

mode too. D3 domain can enter DStop/DStandby mode if both core subsystems do not have

active peripherals in D3 domain, and D3 is not forced in Run mode.

If part of the domain is not in low-power mode, the domain remains in the current mode.

Finally the system can enter Stop or Standby when all EXTI wakeup sources are cleared

and the power domains are in DStop or DStandby mode.

The clock system can be re-initialize by a master CPU (either the Cortex®-M4 or -M7) after

exiting Stop mode while the slave CPU is held in low-power mode. Once the master CPU

has re-initialized the system, the slave CPU can receive a wakeup interrupt and proceed

with the interrupt service routine.

3.7

Reset and clock controller (RCC)

The clock and reset controller is located in D3 domain. The RCC manages the generation of

all the clocks, as well as the clock gating and the control of the system and peripheral

resets. It provides a high flexibility in the choice of clock sources and allows to apply clock

ratios to improve the power consumption. In addition, on some communication peripherals

that are capable to work with two different clock domains (either a bus interface clock or a

kernel peripheral clock), the system frequency can be changed without modifying the

baudrate.

3.7.1

Clock management

The devices embed four internal oscillators, two oscillators with external crystal or

resonator, two internal oscillators with fast startup time and three PLLs.

The RCC receives the following clock source inputs:

•

Internal oscillators:

–

64 MHz HSI clock

–

48 MHz RC oscillator

–

4 MHz CSI clock

–

32 kHz LSI clock

•

External oscillators:

–

HSE clock: 4-50 MHz (generated from an external source) or 4-48 MHz(generated

from a crystal/ceramic resonator)

–

LSE clock: 32.768 kHz

Table 2. System vs domain low-power mode

System power mode

D1 domain power

mode

D2 domain power

mode

D3 domain power

mode

Run

DRun/DStop/DStandby DRun/DStop/DStandby

DRun

Stop

DStop/DStandby

DStop

Standby

DStandby

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